Abstract: The invention describes the use of an antibody specific for serum amyloid P component, for the treatment or prophylaxis of amyloidosis, and the use of a compound which depletes serum amyloid P component from the circulation in combination with an antibody specific for serum amyloid P component.
Abstract: A circuit (10) to acquire a more-preferred stored SID element (62) includes memory (20) and logic circuitry (30). The memory (20) stores a roaming list (60), such as a PRL, that includes a plurality of SID elements ranked according to an order of preference including at least one more-preferred stored SID element (62) and at least one less-preferred stored SID element (64). The logic circuitry (30) is coupled to the memory (20) and performs a first more-preferred SID acquisition sequence (80) and then second more-preferred SID acquisition sequence (82). The second more-preferred SID acquisition sequence (82) includes repeatedly attempting acquisition of the at least one more-preferred stored SID element (62) during the second more-preferred SID acquisition sequence (82) while also attempting to acquire the at least one less-preferred SID element (64) if desired.
Abstract: The present invention provides an analysis method that uses error metrics to determine whether an image is suitable for compression. One embodiment of the present invention can make the determination in real-time. In one embodiment, analysis methods based on four error metrics are used to determine whether a compressed image should be used. The first metric is a signal-to-noise (SNR) error metric that prevents compressed images with low SNR from being used to represent original images. Another metric is detecting the geometric correlation of pixels within individual blocks of the compressed images. The third metric is used to determine whether color mapping in the compressed images are well-mapped. A final metric is a size metric that filters images smaller than a certain size and prevents them from being compressed. As most analysis methods are integral parts of the compression process, the present invention incurs little cost collecting error metric data.
Type:
Grant
Filed:
October 29, 2002
Date of Patent:
March 8, 2011
Assignee:
ATI Technologies ULC
Inventors:
David Oldcorn, Andrew Pomianowski, Raja Koduri
Abstract: A method of determining the doses of neutrons, gamma and X-ray photons, beta, alpha and other ionizing radiations using a method of image processing in spatial and frequency domain that produces parameters that are related to the radiation dose absorbed in a luminescent material. Portions of the luminescent material may be covered by different converters to allow for doses of different radiations to be discriminated.
Abstract: This invention relates of a support assembly (10) for a vehicle (16) of the type that includes an enclosed load carrying compartment (17) having a roof (18), said support assembly being adapted to provide support for a person when moving about on said roof. The support assembly includes a guide (11) that is mountable on the roof and a base (12) that is adapted to engage said guide and which is capable of movement along said guide while remaining engaged therewith. The support assembly also includes a support structure that includes a lower end portion that is pivotally connected to the base and a handle (15) that is spaced from said base. The support assembly also includes a lock (73) for selectively locking the support structure in a desired attitude relative to the base.
Type:
Grant
Filed:
October 13, 2003
Date of Patent:
March 8, 2011
Assignee:
Standfast Holdings, LLC
Inventors:
Neil Bernard McLaughin, Cameron MacMillan Baker, David Palmer, Ian Gillespie, Anthony Finlay
Abstract: An integrated circuit includes a core-logic providing a core-logic output, a latch in communication with the core-logic to store a state of the core-logic output, and an isolation circuit for selectively interconnecting the core-logic output to an input of the latch. The circuit also includes and a power consumption controller in communication with the core-logic, the latch and the isolation circuit, for controlling the latch to store a state of the core-logic output, and output a corresponding signal. The controller is further operable to signal the isolation circuit to isolate the core-logic output from the latch by providing an output corresponding to predetermined value and transition the core-logic from a high power state and a low power state. This prevents transient signals from propagating to interconnected circuit blocks and external devices.
Type:
Grant
Filed:
August 15, 2007
Date of Patent:
March 8, 2011
Assignee:
ATI Technologies ULC
Inventors:
Aris Balatsos, Charles Leung, Siva Raghu Ram Voleti
Abstract: A pipelined computer system with power management control in accordance with one or both of a power management signal and a power management instruction.
Type:
Grant
Filed:
October 31, 2007
Date of Patent:
March 1, 2011
Assignee:
National Semiconductor Corporation
Inventors:
Robert Maher, Raul A. Garibay, Jr., Margaret R. Herubin, Mark Bluhm
Abstract: A large diameter seal having a band of elastic material on its outer diameter to insure a complete and effective sealing in the counterbore and a method for manufacturing this large diameter seal having elastomeric material on its outer diameter.
Abstract: A power management method for a pipelined computer system in accordance with one or both of a power management signal and a power management instruction.
Type:
Grant
Filed:
October 31, 2007
Date of Patent:
March 1, 2011
Assignee:
National Semiconductor Corporation
Inventors:
Robert Maher, Raul A. Garibay, Jr., Margaret R. Herubin, Mark Bluhm
Abstract: A comparator circuit (300) has a first field effect transistor (FET) (307) with a supply voltage (301) connection and a diode connected FET (303) connected in series to form the first circuit leg of the comparator (300). A second diode connected FET (309) and a second FET (305) in series form the second circuit leg. The first FET (307) and said second FET (305) are approximately equal sized FETs. Another embodiment is an integrated circuit (401) with two n-channel FETs. A first diode connected FET (303) is connected to the first n-channel FET (307) in series to form the first circuit leg of a comparator (300) and a second diode connected FET (309) is connected to a second n-channel FET (305) in series to form the second circuit leg of the comparator. The two n-channel FETs that form the differential pair are approximately equal in size. The trip point is high with respect to the supply voltage.
Abstract: The self-elevating platform scaffolding includes a horizontal work platform suspended from a vertical mast tower and a unique lift mechanism mounted to the work platform, which raises and lowers the platform along the length of the tower. The lift mechanism uses a pinion wheel that directly engages a mast tower to raise and lower the work platform along the mast towers. The pinion wheel has a plurality of radially spaced cogs that seat within crescent shaped openings in the mast tower. The lift mechanism is mounted to the work platform adjacent the mast tower such that rotation of the pinion wheel causes the wheel to “walk” up and down the mast tower to raise and lower the platform. The geometric configuration of the pinion wheel is designed so that at least two of the cogs are always in contact with the mast tower. As the pinion wheel turns, each successive cog seats within an adjacent crescent slot in the mast tower with its contact edge bearing against the bottom edge of tower opening.
Abstract: In a device, such as a cell phone, memory resource sharing is enabled between components, such as integrated circuits, each of which has memory resources. This may be accomplished by providing an interconnect between the components and constructing transaction units which are sent over the interconnect to initiate memory access operations. The approach may also be used to allow for a degree of communication between device components.
Abstract: A water soluble polymer comprising a copolyhydroxyaminoether having side-chains of polyalkylene oxides, an aqueous solution of said polymer and process for preparing the copolyhydroxyaminoether.
Type:
Grant
Filed:
November 25, 2009
Date of Patent:
February 22, 2011
Assignee:
Dow Global Technologies, Inc.
Inventors:
Terry W. Glass, William J. Harris, Jerry E. White, Mike Cavitt, David C. Jammer, Louis A. Willy, Jr.
Abstract: A digital data transmitting device is disclosed having differential signaling circuitry, a current source controller and a pair of transistor-implemented current sources is disclosed. The current source controller generates a current source control signal based on a detected mode of operation of the differential signaling circuitry. The pair of transistor-implemented current sources selectively generate source currents to adjust the output voltage levels as the differential output terminals in response to the current source control signal. The digital data transmitting device may also include a current bulk biasing circuit that generates a current source bulk biasing signal such that when the differential signaling circuitry is in one mode of operation, the current source bulk biasing signal retards currents leakage across the pair of transistor-implemented current sources.
Abstract: An integrated circuit package employs a solder pad that includes a predetermined three dimensional surface that is adapted to receive solder. In one example, the predetermined three dimensional surface includes at least one predetermined hill or protruding portion and a valley portion, such as a lower portion, having a predetermined relative height between the hill portion and a valley portion. The predetermined three dimensional surface can be configured in any suitable configuration and may include contoured patterns, non-patterns, or any other suitable configuration as desired. A related method is also described.
Abstract: A video decoding method and apparatus receives a motion compensation shader command, such as a packet, for a programmable shader of a 3D pipeline, such as programmable vertex shaders and pixel shaders, to provide motion compensation for encoded video, and decode the encoded video using the programmable shader of the 3D pipeline. As such, the programmable shader of a 3D pipeline is used to provide motion compensated video decoding as opposed to, for example, dedicated hardware, thereby, among other advantages, eliminating the need for the dedicated hardware.