Patents Represented by Attorney, Agent or Law Firm Vernon W. Francissen
  • Patent number: 6690078
    Abstract: A PIN photodiode and method for forming the PIN photodiode are shown where an intrinsic layer of the photodiode can be made arbitrarily thin and a second active region of the photodiode substantially shields a first active region of the photodiode. A fabrication substrate is lightly doped in order to form the intrinsic layer of the photodiode. A void is formed in a first surface of the fabrication substrate and a first active region of the photodiode having a first conductivity type is formed in the void. An oxide layer is also formed upon the first surface of the fabrication substrate. A handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication substrate is then lapped to a obtain a preselected thickness of the intrinsic layer. A depth of the void is selected such that a portion of the first active region is exposed at the second surface of the fabrication substrate after lapping.
    Type: Grant
    Filed: August 4, 2000
    Date of Patent: February 10, 2004
    Assignee: Integration Associates, Inc.
    Inventors: Pierre R. Irissou, Brian B. North, Wayne T. Holcombe, Stephen F. Colaco
  • Patent number: 6690244
    Abstract: A variable frequency oscillator circuit comprising a resonator circuit part and an amplifier circuit part. The resonator circuit part has a first end and a second end, and it comprises a parallel connected inductor-capacitance pair. The amplifier circuit part comprises first and second transistors having a collector, base, and emitter. The amplifier circuit part further comprises a first impedance matching element connected between the base of the second transistor and the first end of the resonator circuit part, and a second impedance matching element connected between the base of the first transistor and the second end of the resonator circuit part. The impedance matching elements are inductors, namely the third inductor and the fourth inductor. The application of the inductors provides a noise-matched optimum source impedance for the active amplifier circuit part.
    Type: Grant
    Filed: November 28, 2001
    Date of Patent: February 10, 2004
    Assignee: Integration Associates, Inc.
    Inventors: Ferenc Mernyei, Janos Erdelyi
  • Patent number: 6671805
    Abstract: A computer-implemented method for digitally signing an electronic document by a plurality of signers includes determining a signing role of each signer; identifying a to-be-signed portion of the document corresponding to the signing role of each signer; receiving an indication from each signer to digitally sign the document; and applying the digital signature of each signer to the corresponding to-be-signed portion in response to the indication from each signer. A computer-implemented method for processing electronic documents includes receiving a document at a document processing station; reading a processing instruction from a processing portion of the document; identifying a processing service within the document processing station for executing the processing instruction; executing the processing instruction at the document processing station using the identified processing service; and applying a digital signature of the document processing station to the document after the processing is executed.
    Type: Grant
    Filed: June 17, 1999
    Date of Patent: December 30, 2003
    Assignee: iLumin Corporation
    Inventors: Bruce E. Brown, D. Brent Israelsen
  • Patent number: 6628489
    Abstract: A circuit and method are shown for battery reversal protection. The circuit includes a first transistor that buffers a bulk terminal of a protected transistor from an input terminal for receiving a power supply voltage. A second transistor is coupled to both the input terminal of the circuit and an output terminal of the circuit and detects when the power supply voltage falls below an output voltage at the output terminal and, responsive thereto, switches off the first transistor to isolate the bulk terminal of the protected transistor from the input terminal. Another aspect of the invention provides current reversal protection using a third transistor that also detects when the power supply voltage falls below an output voltage at the output terminal and, responsive thereto, conducts current from the output terminal to the gate terminal of the protected transistor.
    Type: Grant
    Filed: May 31, 2001
    Date of Patent: September 30, 2003
    Assignee: Integration Associates Inc.
    Inventors: Matthijs D. Pardoen, Wayne T. Holcombe
  • Patent number: 6583609
    Abstract: One aspect of the present invention detects an equivalent series resistance (ESR) of an external capacitor and adjusts a transfer function of a feedback loop of the voltage regulator to compensate for the ESR. The ESR is detected by measuring a phase shift in a ripple voltage signal of an output voltage of the voltage regulator. Based upon the measured phase shift, an adjustable capacitance is introduced to the feedback loop to compensate for the ESR by introducing a zero to the transfer function to stabilize the voltage regulator circuit. Another aspect of the present invention is to adjust the transfer function of the feedback loop to improve transient response. By measuring both the phase shift and the amplitude of the ripple voltage signal, a gain and the position of a pole in the transfer function of the feedback loop may be adjusted to improve the transient response.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: June 24, 2003
    Assignee: Integration Associates Inc.
    Inventor: Matthijs D. Pardoen
  • Patent number: 6559623
    Abstract: A method and circuit are shown for controlling an in-rush current to a voltage regulator circuit. A sense transistor is coupled in parallel with a pass transistor of the voltage regulator circuit and used to monitor the current through the pass transistor. A sense current through the sense transistor is converted to a voltage signal and input to an amplifier along with a ramping voltage signal generated in response to a circuit activation signal. An output of the amplifier drives a control gate of a current source that sources current to gate terminals of both the pass transistor and the sense transistor. A limiting circuit also monitors the sense current and sinks current from the control terminal of the current source in order to limit a maximum current through the pass transistor.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: May 6, 2003
    Assignee: Integration Associates Inc.
    Inventor: Matthijs D. Pardoen
  • Patent number: 6556330
    Abstract: A method and apparatus are shown for integrating a photodiode and a receiver circuit on a single substrate. An input signal is received with the photodiode. The receiver circuit is configured to suppress feedback from an output terminal of the receiver circuit to the photodiode by amplifying the input signal to produce an amplified input signal, controlling the gain of the input signal amplification responsive to the magnitude of the amplified input signal, comparing the amplified input signal to a detection threshold voltage to produce a digital data signal, and holding the gain at a substantially constant level in response to a fast signal transition in the digital output signal.
    Type: Grant
    Filed: March 4, 2002
    Date of Patent: April 29, 2003
    Assignee: Integration Associates, Inc.
    Inventor: Wayne T. Holcombe
  • Patent number: 6548878
    Abstract: A method is shown for producing a distributed PN photodiode having a first active region of the photodiode that can be made arbitrarily thin. A fabrication substrate is doped to have a first conductivity type in order to form the first active region of the photodiode. A layer can also be formed upon the first surface of the fabrication substrate or a first surface of a handling wafer, where the layer can be an oxide layer, where a thickness of the oxide layer can be controlled to form a dielectric refractive reflector, a reflective layer, or a conductive layer. The first surface of the handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication is then lapped to a obtain a preselected thickness of the first active region. A plurality of second active regions of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate.
    Type: Grant
    Filed: November 23, 1999
    Date of Patent: April 15, 2003
    Assignee: Integration Associates, Inc.
    Inventors: Jean-Luc Nauleau, Wayne T. Holcombe, Pierre Irissou
  • Patent number: 6359517
    Abstract: Disclosed is a front end circuit involving a transimpedance amplifier that drives a resistor, thereby lowering the input impedance of the circuit by dividing the feedback resistance by the gain of the amplifier. In the front end circuit of the present invention, a first transistor is coupled in series with a resistor, where the received signal is input to a base or gate of the first transistor and the amplified received signal is recovered from a collector or drain of the first transistor such that the first transistor and resistor provide the gain of the front end circuit. A second transistor has an emitter or source coupled to the base or gate of the first transistor. A base or gate of the second transistor is coupled to the collector or drain of the first transistor and a collector or drain of the second transistor is coupled to a power supply rail. The second transistor thus provides the feedback path for the transimpedance amplifier thereby reducing the input impedance of the circuit.
    Type: Grant
    Filed: January 29, 2001
    Date of Patent: March 19, 2002
    Assignee: Integration Associates Incorporated
    Inventor: Stephen F. Colaco
  • Patent number: 6356375
    Abstract: A method and apparatus are shown for integrating a photodiode and a receiver circuit on a single substrate. An input signal is received with the photodiode. The receiver circuit is configured to suppress feedback from an output terminal of the receiver circuit to the photodiode by amplifying the input signal to produce an amplified input signal, controlling the gain of the input signal amplification responsive to the magnitude of the amplified input signal, comparing the amplified input signal to a detection threshold voltage to produce a digital data signal, and holding the gain at a substantially constant level in response to a fast signal transition in the digital output signal.
    Type: Grant
    Filed: March 10, 1998
    Date of Patent: March 12, 2002
    Assignee: Integration Associates, Inc.
    Inventor: Wayne T. Holcombe
  • Patent number: 6303967
    Abstract: A method is shown for producing a PIN photodiode using a reduced number of masks wherein an intrinsic layer of the photodiode can be made arbitrarily thin. A fabrication substrate is lightly doped to have a first conductivity type in order to form the intrinsic layer of the photodiode. A first active region of the photodiode having the first conductivity type is formed on a first surface of the fabrication substrate. An oxide layer is also formed upon the first surface of the fabrication substrate. A handling substrate is bonded to the first surface of the fabrication substrate. A second surface of the fabrication is then lapped to a obtain a preselected thickness of the intrinsic layer. A second active region of the photodiode having a second conductivity type is formed on the second surface of the fabrication substrate. A groove is etched from the second surface of the fabrication substrate through the intrinsic region to the first surface in order to isolate the photodiode.
    Type: Grant
    Filed: October 22, 1999
    Date of Patent: October 16, 2001
    Assignee: Integration Associates, Inc.
    Inventor: Pierre Irissou
  • Patent number: 6240283
    Abstract: A method and apparatus is shown for controlling the input gain of a receiver wherein the input gain is controlled by sampling an amplified data signal during a time interval when a positive-going feedback transient from an output terminal of the receiver to an input terminal of the receiver is not present in the amplified data signal. An embodiment of a receiver circuit according to the present invention includes an input amplifier having variable gain determined by a gain control signal, a comparator which compares the amplified data signal from the input amplifier to a detection threshold voltage to produce a demodulated data signal and an analog delay circuit which delays the amplified data signal by a predetermined time interval to produce a delayed data signal. A switch is driven by the demodulated data signal to sample the delayed data signal for input to an automatic gain control circuit.
    Type: Grant
    Filed: August 7, 1997
    Date of Patent: May 29, 2001
    Assignee: Integration Associates, Inc.
    Inventor: Wayne T. Holcombe
  • Patent number: 6198118
    Abstract: A distributed photodiode structure is shown having a plurality of diffusions formed in a uniform pattern on a first surface of a semiconductor substrate and interconnected by a plurality of connective traces. The diffusions are minimum geometry dots for a standard semiconductor fabrication process that are spaced apart from one another by an interval that is less than an average distance travelled by photo-generated carriers in the substrate before recombination. A conductive backplane is formed on a second surface of the semiconductor substrate to produce an inverted induced signal for noise cancelling.
    Type: Grant
    Filed: March 9, 1998
    Date of Patent: March 6, 2001
    Assignee: Integration Associates, Inc.
    Inventor: Wayne T. Holcombe
  • Patent number: 6169765
    Abstract: An output signal pulse width error correction circuit and method wherein errors in a data signal conforming to a communications protocol having a prescribed duty cycle are corrected by monitoring a duty cycle of the data signal, comparing the duty cycle to a duty cycle reference voltage corresponding to the prescribed duty cycle, and adjusting a pulse width of the data signal to conform to the prescribed duty cycle of the protocol. An embodiment is shown that low pass filters the input data signal to introduce greater slope to the input data signal which is then compared to a pulse width control voltage in order to generate an output data signal. The pulse width control voltage is produced by integrating the output data signal to obtain an average value corresponding to the duty cycle of the output data signal and comparing the average value to a duty cycle reference voltage corresponding to the prescribed duty cycle for the communications protocol.
    Type: Grant
    Filed: May 28, 1997
    Date of Patent: January 2, 2001
    Assignee: Integration Associates, Inc.
    Inventor: Wayne T. Holcombe