Abstract: A process for use in fabrication of a semiconductor device is disclosed. The fabricated semiconductor device includes a top oxide aperture within a top oxidation layer and a bottom oxide aperture within a bottom oxidation layer precisely positioned relative to each other, and an electrical contact to a contact layer between the top and bottom oxidation layers. The process includes the following steps: etching past one of the oxidation layers and stopping in the contact layer, etching one or more holes traversing the top and bottom oxidation layers, and simultaneously oxidizing both oxidation layers. Etching past both oxidation layers in the same alignment step ensures that the centers of the two apertures, as formed through selective oxidation, will be aligned.

Abstract: A dimensionally stable core for use in high density chip packages is provided. The stable core is a metal core, preferably copper, having clearances formed therein. Dielectric layers are provided concurrently on top and bottom surfaces of the metal core. Metal cap layers are provided concurrently on top surfaces of the dielectric layers. Blind or through vias are then drilled through the metal cap layers and extend into the dielectric layers and clearances formed in the metal core. If an isolated metal core is provided then the vias do not extend through the clearances in the copper core. The stable core reduces material movement of the substrate and achieves uniform shrinkage from substrate to substrate during lamination processing of the chip packages. This allows each substrate to perform the same. Additionally, a plurality of chip packages having the dimensionally stable core can be bonded together to obtain a high density chip package.

Abstract: Diode lasers are fabricated whose performance is essentially unchanged over designed temperature and bias ranges. The threshold current (Ith) and the external efficiency (&eegr;ext) of the diode lasers are unchanged over a range of specified temperatures.

Abstract: A semiconductor device includes an array of long-wavelength VCSELs pumped by a short-wavelength optical pump. The array of long-wavelength VCSELs includes a series of semiconductor recesses, where each semiconductor recess is between two layers of a VCSEL, substantially overlapping the transverse model profile of the VCSEL under operation.

Abstract: The present invention relates to a system and method for performing reliability screening on semi-conductor wafers and particularly to a highly planar burn in apparatus and method for uses including wafer level burn-in (WLBI), diced die burn-in (DDBI), and packaged die burn-in (PDBI). The burn-in system includes a burn-in substrate with a planar base, a temporary Z-axis connecting member, and a Z-axis wafer level contact sheet electrically coupled to one another for screening wafers, diced die, and packaged electronic components, their assembly and use.