Patents Represented by Attorney Victor F. Lohmann, III
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Patent number: 5285202Abstract: A broadband space switch matrix constructed from a plurality of NAND gates arranged into a set of cascaded stages to form a tree-switch multiplexing configuration. A plurality of input digital signals are applied to input ports coupled to the NAND gates in the first stage. A selected one of the input signals emerges as an output signal from an output port coupled to a single NAND gate in the last stage. Each NAND gate has a select line for receiving control signals. The switching path for the selected input signal is established by placing the sequence of NAND gates defined by the selected switching path in a state of conduction whereby only the selected input signal propagates through the switch. This is effected by forcing to a HIGH state the particular NAND gates in each stage whose outputs are coupled to the same NAND gate in the following stage along with the output of the NAND gate in the current stage which is in the chosen path.Type: GrantFiled: December 11, 1991Date of Patent: February 8, 1994Assignee: GTE Laboratories IncorporatedInventors: Michael Cooperman, Richard W. Sieber, Arnold Paige
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Patent number: 5285090Abstract: Electrical ohmic contacts are made to a matrix of silicon having conductive rods embedded therein without making contact to any of the rods. Those rods which extend to the surface in the selected area of the matrix to be contacted are etched to form holes. The holes are filled with insulating polycrystalline silicon. The region of the selected area is heavily doped, and an ohmic contact member is made thereto. The underlying rods are spaced from the ohmic contact member and the heavily-doped region by intervening polycrystalline silicon.Type: GrantFiled: February 6, 1992Date of Patent: February 8, 1994Assignee: GTE Laboratories IncorporatedInventors: Brian M. Ditchek, Marvin Tabasky
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Patent number: 5272105Abstract: Heteroepitaxial semiconductor structures of, for example, GaAs on InP or Si. The epitaxially grown GaAs is in the form of individual spaced-apart islands having maximum dimensions in the plane of the surface of the substrate of no greater than 10 micrometers. In islands of this size stress in the plane of the epitaxially grown layers due to mismatch of the coefficients of thermal expansion of the substrate and epitaxially grown materials is insignificant.Type: GrantFiled: December 31, 1991Date of Patent: December 21, 1993Assignee: GTE Laboratories IncorporatedInventors: Ben G. Yacobi, Stanley Zemon, Chirravuri Jagannath
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Patent number: 5268066Abstract: A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal structures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.Type: GrantFiled: December 30, 1992Date of Patent: December 7, 1993Assignee: GTE Laboratories IncorporatedInventors: Marvin Tabasky, Victor Cataldo, Thomas W. Fitzgerald, Jagannath Chirravuri, Craig A. Armiento, Paul O. Haugsjaa
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Patent number: 5243652Abstract: A communication system includes a remote mobile node which acquires time-correlated data of its actual position from a global positional system (GPS), and securely transmits the information as a position history to a central facility. The mobile node includes encrypted programming material such as copyrighted video. At the central facility, a comparison is made between the received position history and predetermined signature data representing acceptable time-position histories. If a positive match is detected, a decryption key associated with the matched history is forwarded to the mobile node for decoding of the encrypted programming material.Type: GrantFiled: September 30, 1992Date of Patent: September 7, 1993Assignee: GTE Laboratories IncorporatedInventors: Melvin J. Teare, Stephen S. Walker
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Patent number: 5237825Abstract: An apparatus for cryogenically cooling a sample comprises a sample chamber within which the sample is suspended, and a vacuum chamber enclosing the sample chamber. A cryogenic element forms at least part of the sample chamber and is in spaced-apart relation to the sample. The element is maintained at cryogenic temperatures by a gas cryopump. A sufficient amount of heat-conductive gas is introduced into the sample chamber for placing the sample in thermal communication with the cryogenic element, thereby cooling the sample to cryogenic temperatures.Type: GrantFiled: November 8, 1991Date of Patent: August 24, 1993Assignee: GTE Laboratories IncorporatedInventors: Werner Menzi, Emil S. Koteles
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Patent number: 5238868Abstract: A method of selectively tuning the bandedge of a semi-conductor heterostructure includes forming a disordered region which is spatially separated from a quantum well active region, and subsequently annealing the heterostructure so that vacancies/defects in the disordered region diffuse into the quantum well region and enhance interdiffusion at the well-barrier heterojunctions. The tuning is spatially selective when the heterostructure is masked so that exposed portions correspond to regions where bandgap tuning is desirable. The heterostructures of interest are III-V material systems, such as AlGaAs/GaAs, where the active region includes structures such as a single quantum well, a multiple quantum well, or a superlattice.Type: GrantFiled: July 1, 1991Date of Patent: August 24, 1993Assignee: GTE Laboratories IncorporatedInventors: Boris S. Elman, Emil S. Koteles, Paul Melman, Craig A. Armiento
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Patent number: 5235219Abstract: Electrical circuitry for changing the operating voltage conditions of CMOS inverter circuitry so as to shift its threshold voltage in a direction to cause the duty cycle of the output signals to equal the duty cycle of the input signals. An average filtered DC output voltage from the inverter circuitry is used as a control signal to a variable voltage supply which changes the operating voltages, thus shifting the threshold level of the inverter circuitry.Type: GrantFiled: April 1, 1992Date of Patent: August 10, 1993Assignee: GTE Laboratories IncorporatedInventors: Michael Cooperman, Phillip Andrade
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Patent number: 5228050Abstract: A monolithically integrated multiple-wavelength laser structure includes an array of lasing structures each having a cavity length chosen to correspond to a desired lasing wavelength. The array is suitable for use as a transmitter in a wavelength division multiplexing communication system. The lasing structures preferably include quantum well active regions.Type: GrantFiled: February 3, 1992Date of Patent: July 13, 1993Assignee: GTE Laboratories IncorporatedInventors: Joanne LaCourse, Robert B. Lauer
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Patent number: 5222091Abstract: A semiconductor laser having a high modulation bandwidth is made by utilizing an InGaAsP cap layer and an InGaAsP active layer of different crystal structure. Channels are anisotropically etched through the cap, cladding and active layers and partially through the buffer layer. The active and cap layers a laterally etched and a semi-insullating material is overlayed the sidewalls. A further etching leaves a thin wall of the semi-insulating material surrounding the active layer. 1.3 .mu.m InGaAsP lasers with 3 dB bandwidths of 24 GHz and intrinsic resonance frequencies in excess of 22 GHz have been successfully fabricated. This is the highest bandwidth ever reported for a semiconductor laser, and the highest resonance frequency for InGaAsP lasers. Excellent modulation efficiencies are observed to high frequencies.Type: GrantFiled: January 21, 1992Date of Patent: June 22, 1993Assignee: GTE Laboratories IncorporatedInventors: Roger P. Holmstrom, Edmund Meland, William Powazinik
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Patent number: 5204982Abstract: Apparatus for digital switching of FM signals includes multiple functional switching circuits, each having an input for receiving an FM signal at a first frequency and each generating first switching transients in response to the FM signal. The apparatus includes a dummy switching circuit corresponding to each functional switching circuit. The dummy switching circuits generate second switching transients in response to the FM signal. The second switching transients are shifted in phase relative to the first switching transients such that a crosstalk signal resulting from the first and second switching transients has a frequency of twice the first frequency. The apparatus further includes filters for attenuating the crosstalk signal. By shifting the frequency of the crosstalk signal to twice the frequency of the FM signal, the crosstalk signal is easily filtered.Type: GrantFiled: November 14, 1990Date of Patent: April 20, 1993Assignee: GTE Laboratories IncorporatedInventor: Michael Cooperman
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Patent number: 5192696Abstract: A junction field effect transistor, specifically a static induction transistor. The N-type source regions are formed as two zones. First, relatively lightly doped first zones are formed by ion-implanting doping material relatively deeply into the semiconductor material. Then relatively heavily doped second zones are formed by ion-implanting doping material to a relatively shallow depth within the first zones to leave portions of the first zones interposed between the second zones and the remainder of the semiconductor material. The resulting devices exhibit reduced gate-drain junction capacitance at low drain bias voltages thereby improving device capacitance linearity.Type: GrantFiled: January 15, 1992Date of Patent: March 9, 1993Assignee: GTE Laboratories IncorporatedInventors: Emel S. Bulat, Charles Herrick
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Patent number: 5192699Abstract: Method of fabricating a junction field effect transistor employing self-alignment techniques. The active regions of the device are defined by a relatively thin thermally-grown isolating silicon oxide layer at the surface of a silicon body. After the active source and gate regions of the device as defined by the thermally-grown isolatign silicon oxide are formed in the silicon, a layer of deposited silicon oxide is formed over the thermally-grown silicon oxide. This method provides a thick dielectric layer as well as control of the horizontal dimensions of the source and gate contacts.Type: GrantFiled: December 17, 1990Date of Patent: March 9, 1993Assignee: GTE Laboratories IncorporatedInventors: Emel S. Bulat, Maureen Sullivan
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Patent number: 5191460Abstract: A method and apparatus for high speed transmission of data in the solar blind region is disclosed. An ultraviolet source is modulated to permit digital transmission of data. The source includes an electrodeless capsule of UV transmitting material filled with iodine vapor. A means of energizing the iodine vapor into a plasma state is provided by a magnetron, power triode or solid state supply. A circuit to modulated the energizing means is used to impress upon the plasma discharge the encoded data. Filtering means surround the capsule to filter out the plasma background noise. The advantages of the UV communications method and apparatus described are increased pulse rate, faithful conversion of electrically pulsed data into optical pulses with decreased error rate, decreased probability of interception and non-line of sight communication.Type: GrantFiled: December 19, 1990Date of Patent: March 2, 1993Assignee: GTE Laboratories IncorporatedInventor: Walter P. Lapatovich
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Patent number: 5182782Abstract: A waferboard assembly incorporates mechanical registration features into a substrate platform to facilitate the passive alignment of lasers integrated on a chip to fibers in integral contact with the substrate. The waferboard includes two front pedestal structures and one side pedestal structure, and two vertical post structures within a mounting region defined by the pedestal structures. The laser chip is mounted on the vertical post structures, and placed in concurrent abutting contact with the pedestal structures. The waferboard is fabricated by etching the substrate to form the front and side pedestal structures, and etching the substrate to define the grooves. In order to form the post structures, a polyimide material is deposited on the substrate using an appropriate mask.Type: GrantFiled: January 7, 1992Date of Patent: January 26, 1993Assignee: GTE Laboratories IncorporatedInventors: Marvin Tabasky, Victor Cataldo, Thomas W. Fitzgerald, Jagannath Chirravuri, Craig A. Armiento, Paul O. Haugsjaa
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Patent number: 5175740Abstract: A ridge-waveguide laser is fabricated by epitaxially growing a GaAs-based heterostructure, disposing an AlAs etch stop layer on the heterostructure, disposing epitaxial layers on the etch stop layer, and etching the heterostructure to form the laser whereby the etch stop layer prevents further etching into said heterostructure.Type: GrantFiled: July 24, 1991Date of Patent: December 29, 1992Assignee: GTE Laboratories IncorporatedInventors: Boris S. Elman, Wayne F. Sharfin
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Patent number: 5173959Abstract: A method and apparatus is disclosed for assembling an array of optical fibers in a substrate. The method comprises forming a series of parallel V-shaped grooves in the top surface of the substrate placing the substrate on a base plate positioning an upper plate in spaced apart relationship with the substrate so as to form channels between the upper plate and the V-shaped grooves. A vacuum is then applied at one end of the channel formed between the upper plate and the V-shaped grooves, and optical fibers are then sequentially fed into each of the V-shaped grooves and are drawn into the grooves to a stop at the other end thereof. The fibers are then bonded to the substrate.Type: GrantFiled: September 13, 1991Date of Patent: December 22, 1992Assignee: GTE Laboratories IncorporatedInventor: John A. Cambriello
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Patent number: 5170160Abstract: A broadband space tree-switch matrix establishes a desired switching path by sensitizing only the sequence of logic gates defined by the desired path such that only these sensitized logic gates are operable to undergo switching and thereby permit transmission of only the corresponding input signal. The tree-switch includes a plurality of cascaded stages wherein the first stage consists of dual-input NAND gates each receiving a corresponding input signal at one input and a control signal at another input. The remaining stages include a plurality of switching nodes each having a first NAND gate cascaded to a second NAND gate wherein the second NAND gate has a HIGH steady-state logic signal present at one of its inputs. An appropriate combination of control signals are applied to the NAND gates in the first stage to effect a selected switching path. A second broadband space switch matrix comprises a plurality of NAND gates arranged into a series of cascaded stages to form a tree-switch configuration.Type: GrantFiled: August 12, 1991Date of Patent: December 8, 1992Assignee: GTE Laboratories IncorporatedInventors: Michael Cooperman, Richard W. Sieber, Arnold Paige
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Patent number: 5163108Abstract: A method of passively aligning optical receiving elements such as fibers to the active elements of a light generating chip includes the steps of forming two front and one side pedestal structures on the surface of a substrate body, defining a vertical sidewall of the chip to form a mating channel having an edge at a predetermined distance from the first active element, mounting the chip epi-side down on the substrate surface, and positioned the fibers in fiber-receiving channels so that a center line of each fiber is aligned to a center line of a respective active element. When mounted, the front face of the chip is abutting the contact surfaces of the two front pedestals, and the defined sidewall of the mating channel is abutting the contact surface of the side pedestal. The passive alignment procedure is also effective in aligning a single fiber to a single active element.Type: GrantFiled: August 2, 1991Date of Patent: November 10, 1992Assignee: GTE Laboratories IncorporatedInventors: Craig A. Armiento, Chirravuri Jagannath, Marvin J. Tabasky, Thomas W. Fitzgerald, Harry F. Lockwood, Paul O. Haugsjaa, Mark A. Rothman, Vincent J. Barry, Margaret B. Stern
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Patent number: 5163113Abstract: An apparatus for coupling light from a laser chip into an untreated, unetched optical fiber includes a mounting block to which is attached the chip, and a substrate carrier attached to the block and having a channel space extending axially through the substrate carrier. The fiber has a beveled end with an inner and outer face and is positionable within the channel space such that light emitted by the laser chip strikes the inner face of the beveled end and is totally internally reflected into the fiber core. In an alternate coupling assembly, light from the laser chip is reflected by a mirror to form a beam spot on the inner face of the beveled end where it is likewise totally internally reflected into the fiber.Type: GrantFiled: July 19, 1990Date of Patent: November 10, 1992Assignee: GTE Laboratories IncorporatedInventor: Paul Melman