Patents Represented by Attorney Volrath & Associates
  • Patent number: 7910950
    Abstract: In an LDMOS-SCR ESD protection structure gate voltage of an ESD protection LDSCR is defined by connecting the gate to the source of a reference LDSCR. The reference LDSCR is implemented as a self-triggering device in which the snapback drain-source voltage (avalanche breakdown voltage) is controlled to be lower than that for the major LDSCR by adjusting the RESURF layer-composite overlap for the reference LDSCR to be different to that of the major LDSCR.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: March 22, 2011
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Vashchenko, Peter J. Hopper
  • Patent number: 7521310
    Abstract: In a complementary SiGe bipolar process, a pnpn thyristor structure is formed from some of the layers of a pnp transistor and an npn transistor formed on top of each other and making use of the SiGe gates to define the blocking junction.
    Type: Grant
    Filed: October 29, 2005
    Date of Patent: April 21, 2009
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Vashchenko, Alexel Sadovnikov, Peter J. Hopper