Patents Represented by Attorney W. Daniel Swayze
  • Patent number: 7393255
    Abstract: The present invention is a to board riding craft having split tail sections. A central core element may have a tail end, a nose and two sides. A tail portion of the central core element may have one or more slits formed therein that may extend from the tail end approximately parallel to a centerline of the central core element approximately one eighth to one third the distance between the tail end and the nose.
    Type: Grant
    Filed: February 9, 2006
    Date of Patent: July 1, 2008
    Inventor: Gene Wilhelmi
  • Patent number: 5795382
    Abstract: A method for controlling oxygen precipitation (106) in a silicon crystal (12) grown according to the Czochralski silicon crystal growing technique which includes the steps of forming a cylindrical portion (22) of the silicon crystal (12) from a reservoir of molten silicon (24) according to the Czochralski silicon crystal growing technique. The method includes the steps of terminating the Czochralski silicon crystal growing technique by forming a first tapered portion (101) in silicon crystal (12) at a predetermined rate. A second tapered portion (102) includes a cascaded middle portion (108) that connects to the first tapered portion (101) and that concentrates oxygen precipitation (106) within cascaded middle portion (108) and away from the cylindrical portion (22) of silicon crystal (12). At least a third tapered portion (104) is formed for separating silicon crystal (12) from molten silicon (24).
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 18, 1998
    Assignee: Texas Instruments Incorporated
    Inventors: Weldon J. Bell, H. Michael Grimes
  • Patent number: 5702959
    Abstract: A process for making a vertical PNP transistor and a transistor made by the process includes providing a highly doped semiconductor substrate (10) of P conductivity type. A first lightly doped P- layer (12) is epitaxially grown on the substrate (10). An N+ type buried layer impurity (18) is introduced into a surface region of the first lightly doped layer (12) that will underlie and define an island in which the vertical transistor will be constructed. A second lightly doped P- layer (16) is epitaxially grown on the first lightly doped layer (12) and the buried layer impurity (18). An N+ type isolation impurity is diffused into the second layer to form wells to laterally enclose an island (22) of the second layer (16) above the buried layer impurity (18). An N type base impurity (28) is diffused into the island (22) region of the second layer (16), and a P type emitter impurity (30) is diffused into the base region (28).
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: December 30, 1997
    Assignee: Texas Instruments Incorporated
    Inventors: Louis N. Hutter, Jeffrey P. Smith
  • Patent number: 5365487
    Abstract: A DRAM furnishes power management circuits that remove power from circuits on the DRAM that are not necessary for self-refresh and that turn on and off other circuits necessary for self-refresh in timed relation to the refresh cycle. The power management circuits include a counter and simple decoder circuits that decode the binary output of the counter.
    Type: Grant
    Filed: March 24, 1992
    Date of Patent: November 15, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Vipul C. Patel, David R. Brown, Jim C. Tso
  • Patent number: 5355317
    Abstract: A system level automation tool for system design using a computer is operable to generate a first set of objects each defining a portion of the system. The objects have a parent-child relationship wherein one or more child objects each define a portion of the parent object. A second set of implementable objects is associated with the first set of objects using a transitional mapping (TRAM) describing the relationships between the first and second sets of objects.
    Type: Grant
    Filed: February 26, 1991
    Date of Patent: October 11, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Marvin T. Talbott, Henry L. Burks, Richard W. Shaw, Donald D. Strasburg, Katherine K. Hutchison
  • Patent number: 5353376
    Abstract: Systems and methods for improved speech acquisition are disclosed including a plurality of linearly arrayed sensors to detect spoken input and to output signals in response thereto, a beamformer connected to the sensors to cancel a preselected noise portion of the signals to thereby produce a processed signal, and a speech recognition system to recognize the processed signal and to respond thereto. The beamformer may also include an adaptive filter with enable/disable circuitry for selectively training the adaptive filter a predetermined period of time. A highpass filter may also be used to filter a preselected noise portion of the sensed signals before the signals are forwarded to the beamformer. The speech recognition system may include a speaker independent base which is able to be adapted by a predetermined amount of training by a speaker, and which system includes a voice dialer or a speech coder for telecommunication.
    Type: Grant
    Filed: March 20, 1992
    Date of Patent: October 4, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Sang G. Oh, Vishu R. Viswanathan
  • Patent number: 5280619
    Abstract: Apparatus for scheduling at least two concurrent transactions accessing a shared data is provided. When a lock request is granted, the apparatus provides for constructing a history file for the shared data to show each data accessing transaction, and also provides for constructing a serialization graph with each node denoting an active transaction, and each directed edge denoting a dependency between two transactions. The serialization graph is searched for a cycle formed by transactions, and if any is found, the transactions are aborted and restarted.
    Type: Grant
    Filed: May 17, 1990
    Date of Patent: January 18, 1994
    Assignee: Texas Instruments Incorporated
    Inventor: Chung C. Wang
  • Patent number: 5263155
    Abstract: A method is disclosed for concurrency control in a system having both pessimistic and optimistic transactions, comprises the steps of entering locks on objects both for optimistic and pessimistic transactions, and validating an optimistic transaction at commit time by checking that all objects on which said optimistic transaction holds a lock have not become obsolete during the execution of said optimistic transaction. Further, a system is shown enabling optimistic and pessimistic transactions to coexist, comprising a lock table into which locks are entered for both optimistic and pessimistic transactions, a wait queue in which pessimistic transactions are entered to wait for locks held by either optimistic or pessimistic transactions, a conflict table which is referenced to determine if a lock held by a first transaction is a conflict lock with respect to a lock requested by a second transaction, and code connected to the lock table, wait queue, and conflict table.
    Type: Grant
    Filed: February 21, 1991
    Date of Patent: November 16, 1993
    Assignee: Texas Instruments Incorporated
    Inventor: Chung C. Wang
  • Patent number: 5257209
    Abstract: A method for using a computer-based imaging system, which may be in motion, to observe a moving object and determine its motion. The imaging system is used to obtain at least two images separated by a known time interval. The apparent motion of the observed object is expressed in terms of its true optical flow parameters with coefficients that represent the camera motion, projection geometry, and time interval. The result is a system of equations that may be solved for the true optical flow parameters.
    Type: Grant
    Filed: August 10, 1992
    Date of Patent: October 26, 1993
    Assignee: Texas Instruments Incorporated
    Inventor: Vishal Markandey