Abstract: A semiconductor device structure having a semiconductor device on a substrate with a layer of benzocyclobutane (BCB) disposed about the device with a via between the top surface of the BCB and the device is disclosed. A bond pad is in contact with the via and is connected to a bond ribbon.

Abstract: A metal semiconductor field effect transistor (MESFET) having a reduced control voltage while maintaining appropriate performance characteristics is disclosed. The MESFET is fabricated by a two step implantation technique for fabricating the ohmic contact region in the channel between the source and drain. This implant process results in higher doping levels of the active channel and a increased conductivity. Additionally, this step defines the channel depth, which in turn defines the pinch-off voltage. In the preferred embodiment of the present invention, the channel thickness is on the order of 2000 Angstroms. Parasitic capacitance is reduced to an acceptable level by reduction in the gate length. Finally, after the implantation of donor dopants to effect the active channel, a suitable acceptor dopant, preferably beryllium, is implanted to produce a well defined channel boundary, to reduce the donor dopant tails. This facilitates the control of the pinch-off voltage.

Abstract: A bi-directional optical link, comprising: a light source for transmitting light at a first wavelength; a photodetector in substantially linear arrangement with the light source for detection of light of a second wavelength; and an optical fiber for carrying light of the second wavelength to the photodetector and for carrying light of the first wavelength from the light source, the optical fiber in substantially linear arrangement with the photodetector and the light source.

Abstract: Light emitting devices are requiring greater switching speeds to achieve greater modulation bandwidths. The problems of intrinsic capacitance associated with conventional semiconductor heterojunction devices are reduced by the reduction of pn junction capacitance as well as the use of a semi-insulating blocking layer and a conductive substrate. Furthermore, a light absorbing layer is disposed on one side of an unetched portion of the semi-insulating material and an active layer disposed on an opposite side of the unetched portion. Also, the interface of the semi-insulating material and the active and absorbing layers are at prescribed angles that reduce back reflections to the absorbing and active layers. This arrangement reduces pumping in the absorbing region and thus reduces the lasing effect, allowing for a stable LED.

Abstract: The present invention relates to a novel, accurate, passive alignment of optical and optoelectronic elements using silicon waferboard technology. The invention particularly relates to the use of etched v-grooves on monocrystalline materials in conjunction with alignment spheres to effect the passive alignment.