Abstract: An analog-to-digital conversion system module and method provides programmable times for sampling analog input signals. Software involvement is minimized by providing a command word which includes information specifying a sample time. The command word may be stored in a register or memory table. The command word or words may specify the conversion time per analog input channel or group of channels, and per conversion or conversion sequence. In one embodiment a control table comprises a plurality of conversion command words (CCW's). Each CCW designates conversion parameters including the input sample time.
September 4, 1990
Date of Patent:
January 14, 1992
Jules D. Campbell, Jr., William D. Huston, Mark R. Heene
Abstract: A prioritizing circuit is provided for arbitrating between asynchronously occurring memory access request and memory refresh request signals to a dynamic RAM memory module. The circuit includes a latch circuit (20), a latch control circuit (21), and priority logic (22). The latch circuit is responsive to the request signals and latches the state of both signals upon receipt of a strobe signal generated by the latch control circuit. The latch control circuit generates the strobe signal upon detection of the first access request signal transmitted to the latch circuit at a predetermined logic level. To arbitrate priority between request signals occurring substantially simultaneously, the priority logic includes a combinatorial logic network responsive to the outputs of the latch circuit for generating a grant signal corresponding to the request signal having the higher priority.