Patents Represented by Attorney Walter J. Madden
  • Patent number: 6041365
    Abstract: A method of simultaneously executing one or more computer application programs in one or more host computer system or server system under the control of a second computer system, where the host computer system or server system generates either presentation information or generic computer messages, or both, based on the application programs, involves establishing selected parameters in the host computer presentation information or messages, or both, interpreting selected portions of the host computer system's presentation information or message information, or both, as input to a computer program resident in the second computer system, examining the host computer system presentation information or message information, or both, at the second computer system to detect the presence therein of one or more of the selected parameters utilizing information in a custom object database, and continuing operation of the second computer system during the examining for the selected parameters.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: March 21, 2000
    Inventor: Aurel Kleinerman
  • Patent number: 5734871
    Abstract: A method of simultaneously executing one or more computer application programs in one or more host computer system under the control of a second computer system, where the second computer system performs operations on data and instructions and the host computer systems generates presentation information based on the application programs, involves establishing selected parameters in the host computer presentation information, interpreting selected portions of the host computer system's presentation information, providing the interpreted selected portions of the host computer system's presentation information as input to a computer program resident in the second computer system, examining the host computer system presentation information at the second computer system to detect the presence therein of one or more the selected parameters, continuing operation of the second computer system during the examining for the selected parameters, and generating an indication to the second computer system of the detection
    Type: Grant
    Filed: October 13, 1995
    Date of Patent: March 31, 1998
    Assignee: Mitem Corporation
    Inventors: Aurel Kleinerman, David J. Carroll
  • Patent number: 5155807
    Abstract: A system for transferring data between a pair of data processing units having system buses includes a plurality of memories in each of the data processing units; each memory having a random access portion and an associated sequential access portion; means for transferring data between each of the random access portions of each of the memories and its associated sequential access portion; and means connecting the sequential access portions of each of the memories in one of the data processing units to the sequential access portions of the other of said data processing units to permit data flow therebetween; the data flow between the sequential access portions of said memories occurring asynchronously of the remainder of the system so that the data processing units can utilize their system buses during such data flow.
    Type: Grant
    Filed: September 14, 1990
    Date of Patent: October 13, 1992
    Assignee: International Business Machines Corporation
    Inventors: Ballard J. Blevins, William G. Kulpa, Joseph R. Mathis
  • Patent number: 4811206
    Abstract: A method of operating a data processing system using virtual memory in which virtual memory addresses are formed by a base register value and a displacement value and are mapped to real memory addresses includes the steps of adding the base register value content and the displacement value, and simultaneously with the adding operation, performing a translation of the base register value to produce a virtual address corresponding to the base register value.
    Type: Grant
    Filed: January 16, 1986
    Date of Patent: March 7, 1989
    Assignee: IBM Corporation
    Inventor: William M. Johnson
  • Patent number: 4807124
    Abstract: A microcoded data processing system utilizes common microcode execution routines for both register-to-register operations and memory-to-register operations. The system includes a memory data register for storing an operand for use in a memory-to-register operation, a pair of address registers for containing the addresses of the registers to be involved in the execution of register-to-register instructions, and circuitry responsive to generation of an instruction indicating a memory-to-register operation for generating the address of the memory data register from one of the address registers, whereby the register-to-register operations and the memory-to-register operations can share common execution routines without any performance time penalty or any increase in required microcode.The system also provides for the simultaneous generation of the addresses of all registers to be employed in instructions involving multipart operands.
    Type: Grant
    Filed: September 26, 1986
    Date of Patent: February 21, 1989
    Assignee: Performance Semiconductor Corporation
    Inventors: Yeshayahu Mor, Leonardo Sandman, Yeshayahu Schatzberger
  • Patent number: 4794522
    Abstract: A method of emulating the instructions of a target computer in the instructions of a host computer to operate the host computer in accordance with the target computer instructions, the target computer having the capability of modifying its own instructions and data during operation, includes the steps of storing the target instructions in a target memory segment, sequentially withdrawing the target instructions from the target memory segment and executing the target instructions in the host computer, constructing a template of the host instructions for each of the target instructions executed, storing each of the templates for reuse each time the corresponding target instruction is to be executed, limiting access to those target instructions in the target memory segment which have been stored in one of the templates to permit only read operations to be performed thereon, and detectng a target instruction which attempts a write operation on one of the target instructions which is in a stored template.
    Type: Grant
    Filed: September 30, 1985
    Date of Patent: December 27, 1988
    Assignee: International Business Machines Corporation
    Inventor: Richard O. Simpson
  • Patent number: 4794515
    Abstract: A data processing system operates in a multiprogramming mode in which a plurality of different tasks are performed, at least one of the tasks being interruptable by another one of the tasks, and the system includes at least one facility which is not used by all of the tasks. The method of operating the system includes the steps of permitting access to the facility by a first task requesting such access, detecting the interruption by a second task of the first task prior to completion of the first task's use of the facility, and preventing access to the facility by any task until the data and state information in the facility relative to the first task has been stored outside the facility.
    Type: Grant
    Filed: January 17, 1986
    Date of Patent: December 27, 1988
    Assignee: International Business Machines Corporation
    Inventor: Louis M. Hornung
  • Patent number: 4788683
    Abstract: Apparatus is provided for testing a data processing system which includes a microprocessor, the testing occurring with the microprocessor in place in the system. The apparatus comprises: a support microprocessor for controlling the testing, a serial-to-parallel and parallel-to-serial converter connected between the support microprocessor and the system microprocessor, means for supplying a series of level sensitive scan design (LSSD) test signals from the support microprocessor through the converter to the system microprocessor, and means for returning the results of the level sensitive scan design test signals from the system microprocessor through the converter to the support microprocessor.
    Type: Grant
    Filed: January 7, 1988
    Date of Patent: November 29, 1988
    Assignee: IBM Corporation
    Inventors: Phillip D. Hester, William M. Johnson
  • Patent number: 4787062
    Abstract: Races and hazards in simulated logic designs are more easily detected if the logic simualtor is able to warn the designer of the presence of glitches. A glitch wall occur at the output of a logic device if an input condition causes the output to begin to change but the input condition is not present for sufficient time to allow the output to reach its stable state. The logic evaluator is the component of the logic simulator which is responsible for determining the output of a simulated device when the inputs to that device are known. The glitch detecting logic evaluator according to the present invention provides glitch detection by forcing the simulated device output to the undefined state when the device inputs change in a manner which does not allow the change to propagate to the output before a subsequent change occurs. The algorithms are designed for implementation in hardware for high performance logic simulation.
    Type: Grant
    Filed: June 26, 1986
    Date of Patent: November 22, 1988
    Assignee: Ikos Systems, Inc.
    Inventors: Chu C. Nei, Dan R. Hafeman, William Fazakerly
  • Patent number: 4787061
    Abstract: Logic simulation is performed using special purpose hardware which operates in either one of two simulation modes. The machine allows detailed timing simulation where each device may be programmed with a delay time of zero, one, or multiple simulation time units. In addition, the machine supports zero and unit delay simulation in a high performance "unit delay" mode. The logic simulation function is partitioned into six sub-functions which are implemented in a single stage of a six-stage pipeline. The pipeline stages which implement the multi-unit delay time queue management may be switched to perform a different algorithm for unit delay simulation. The machine is able to perform extremely fast functional circuit testing and to perform detailed timing simulation without changing the circuit "netlist".
    Type: Grant
    Filed: June 25, 1986
    Date of Patent: November 22, 1988
    Assignee: Ikos Systems, Inc.
    Inventors: Chu C. Nei, Dan R. Hafeman, William Fazakerly
  • Patent number: 4779093
    Abstract: A bus interface system for communicating between a master bus interface and a plurality of slave bus interfaces includes a plurality of lines extending between the master unit and each of the slave units, the lines including a clock line containing clock signals, a gated clock line containing gated clock signals having a frequency which is a submultiple of the frequency of the clock signals, a data line, a command register line, an active line, and circuitry for exchanging data between the master unit and one of the slave units on the data line under the control of the other lines.
    Type: Grant
    Filed: March 4, 1986
    Date of Patent: October 18, 1988
    Assignee: LSI Logic Corporation
    Inventor: Daniel R. Watkins
  • Patent number: 4741339
    Abstract: Apparatus is provided for improving the coupling between an external inductive transmitting coil and an internal inductive receiving coil to transmit power and/or data to the receiving coil from the transmitting coil. The structure includes a coupling coil inductively coupled to the transmitting coil to increase the Q factor and hence the energy transfer between the transmitting coil and the receiving coil.
    Type: Grant
    Filed: October 21, 1985
    Date of Patent: May 3, 1988
    Assignees: Cochlear Pty. Limited, University of Melbourne
    Inventors: James M. Harrison, Peter M. Seligman
  • Patent number: 4736338
    Abstract: A simulation technique for modeling the function of logic elements containing memory is disclosed. The technique uses a table to represent the logical function of the devices that are being simulated.
    Type: Grant
    Filed: October 7, 1986
    Date of Patent: April 5, 1988
    Assignee: Silicon Solutions Corporation
    Inventors: Timothy Saxe, Daniel R. Perkins
  • Patent number: 4720797
    Abstract: A control system is provided for a processing container line to detect the occurence of a jam or other malfunction within the line. The system compensates for the initialization of the line when a number of containers enter the line before any are discharged therefrom. The system also allows for a tolerable limit on the number of containers which may become "lost" in the processing line without indicating a jam in the line.
    Type: Grant
    Filed: May 17, 1985
    Date of Patent: January 19, 1988
    Assignee: Peco Controls Corporation
    Inventors: John Sommerfield, Raymond E. Babb
  • Patent number: 4700400
    Abstract: A method is provided for forming feature vectors representing the pixels contained in a pattern desired to be recognized, and reference patterns. One part of the feature vector is representative of the pixels contained in the pattern itself, while not requiring a very large feature vector which exactly defines each pixel of the pattern. One embodiment of this invention provides that another part of the feature vector, consisting of one or more bytes of the feature vector, defines the aspect ratio of the pattern. In one embodiment, each byte of the feature vector representing the pixels contained in the character represents the relative ratio of black pixels to total pixels in a specific area of the character; other functions relating input matrix and output feature vector information can be used.
    Type: Grant
    Filed: October 10, 1985
    Date of Patent: October 13, 1987
    Assignee: The Palantir Corporation
    Inventor: David J. Ross
  • Patent number: 4695024
    Abstract: An adjustable arm for controlling the horizontal and vertical position of an object mounted at one end of the arm comprises:means for rigidly mounting the end of the arm opposite the end at which the object is mounted;a plurality of interconnected links, a first group of the plurality of links controlling the horizontal position of the arm and the object; anda counterbalancing link among the plurality of links, the counterbalancing link being disposed intermediate the first group of links, the counterbalancing link serving to provide vertical movement of the plurality of links and the object and to counterbalance the weight of the object at the one end of the arm.
    Type: Grant
    Filed: May 9, 1986
    Date of Patent: September 22, 1987
    Assignee: Attain, Inc.
    Inventor: Kenneth R. Haven
  • Patent number: 4675596
    Abstract: Apparatus for determining the dielectric constant of a fluid as a measure of possible contaminants therein. A reference fluid sample having a known dielectric constant is first placed in a capacitive dielectric sensor and then the fluid to be analyzed is placed in the sensor. By comparing the measured values, an indication is provided of the degree of contamination of the analyzed fluid.
    Type: Grant
    Filed: September 10, 1984
    Date of Patent: June 23, 1987
    Assignee: Zidex Systems
    Inventor: Thomas Smith
  • Patent number: 4670708
    Abstract: Circuitry is provided for testing fusible link arrays for short circuits around the fusible links. Each link is electrically isolated and compared with a pair of reference fusible links to detect the presence or absence of a short circuit.
    Type: Grant
    Filed: July 30, 1984
    Date of Patent: June 2, 1987
    Assignee: Monolithic Memories, Inc.
    Inventors: Bob Bosnyak, Albert Chan, Mark Fitzpatrick, Gary Gouldsberry, Cyrus Tsui, Andrew K. Chan
  • Patent number: 4651092
    Abstract: For characterizing coating compositions with magnetic particles the coating composition is subjected to an alternating magnetic field of variable frequency. The field induced by the coating composition after energization is recorded, and thus the susceptibility of the coating composition is measured. Depending on the variable frequency, conclusions can be made regarding the degree of dispersion, particle density, and viscosity of the coating composition. The variable frequency is between 1 and 100 cps, and the field intensity of the energizing field should be lower than 10 Oerstedt. The coating composition is fluid or stagnant in a pipe *1, 11 which is surrounded by field coil and measuring coil.
    Type: Grant
    Filed: September 21, 1983
    Date of Patent: March 17, 1987
    Assignee: International Business Machines Corporation
    Inventors: Arwed Brunsch, Werner Steiner, Gerhard Trippel
  • Patent number: D295978
    Type: Grant
    Filed: August 30, 1985
    Date of Patent: May 31, 1988
    Assignee: TeleVideo Systems, Inc.
    Inventor: Robert Brunner