Abstract: Roughly described, therefore, in accordance with a preferred embodiment of the present invention, a method is provided for fabricating an N-bit memory device with self-aligned buried diffuision implants and two isolated ONO segments in one cell. The method includes the steps of forming an ONO layer on a substrate, depositing a polysilicon layer, patterning the polysilicon layer, implanting barrier diffusion, trimming the photoresist layer on the polysilicon layer, etching the polysilicon layer by using the trimmed photoresist layer as mask, then removing the photoresist. After removing the photoresist, a nitride layer is filled in the patterned polysilicon layer openings. The etching steps are preformed by using the nitride layer as a mask. The polysilicon layer and part of the ONO layer are removed, and the gate oxide layer is exposed. Two isolated ONO segments are formed by these etching steps. A polysilicon gate is then formed on the gate oxide layer.

Abstract: Method and agent network architecture for processing a subject message, where each agent has a view of its own domain of responsibility. An initiator agent which receives a user-input request and does not itself have a relevant interpretation policy, queries its downchain agents whether the queried agent considers such message to be in its domain of responsibility. Each queried agent recursively determines whether it has an interpretation policy of its own that applies to the request, and if not, further queries its own further downchain neighboring agents. The further agents eventually respond to such further queries, thereby allowing the first-queried agents to respond to the initiator agent. The recursive invocation of this procedure ultimately determines one or more paths through the network from the initiator agent to one more more leaf agents.

Abstract: A software visualization tool consistent with the present invention integrates OLAP functionality with focus+context based techniques for navigation through and inspection of large multidimensional datasets. Focus+context based navigation techniques are used to increase the clarity and information content provided to the user. The visualization tool supports a number of operations of the data set, including: select-slice, aggregation, promote/demote, repeat-variables, and sort.

Abstract: Roughly described, a CRT contains a magnetic loop bender which causes the beam to undergo a 270° (for example) bend and intersect itself before exiting the bender orthogonally with the screen. Downstream of the bender, the beam is deflected by conventional biaxial scanning means before impingement on the screen. A magnetic field stop plate can be added in a plane that passes through the beam intersection point and that lies parallel to the pole termination plane of the bender magnetic structure. An astigmatic beam shaping mechanism can also be included, as can post-deflection acceleration of the beam to provide further shortening of the tube depth as well as a focusing action that reduces the effect of beam enlargement due to mutual electron repulsion within the beam. All of the beam bending and deflection can be done by externally attached components.

Abstract: Method and agent network architecture for processing a subject message, where each agent has a view of its own domain of responsibility. An initiator agent which receives a user-input request and does not itself have a relevant interpretation policy, queries its downchain agents whether the queried agent considers such message to be in its domain of responsibility. Each queried agent recursively determines whether it has an interpretation policy of its own that applies to the request, and if not, further queries its own further downchain neighboring agents. The further agents eventually respond to such further queries, thereby allowing the first-queried agents to respond to the initiator agent. The recursive invocation of this procedure ultimately determines one or more paths through the network from the initiator agent to one more more leaf agents.

Abstract: A system and method for emulating a USB peripheral device is disclosed. The system utilizes a USB programming and operating interface to interact with the host but formats the data into a format usable by a non-USB peripheral device. Such a system consumes less real estate and power than a USB interface controller and USB peripheral, but remains compatible with software designed to interact with those USB devices.

Abstract: An optical device includes at least a first and second electrical conductors. At least one optical layer overlies at least a portion of the first and second electrical conductors. An applicator is positioned proximate to said at least one optical layer to selectively redirect light from the optical layer. An electrical coupling path between said at least one applicator and one of said first or second electrical conductors, at least a portion of the coupling path traversing said at least one optical layer. At least one optical waveguide may be formed in an optical layer above said electrical conductors. A feature is located to receive light redirected by the applicator and at least one electrical coupling path, which may be included in said feature, couples the applicator and at least one of said plurality of conductors. In a further aspect, a method for manufacturing an optical device is disclosed.

Abstract: Roughly described, piezoelectric actuators are tested as part of an assembly using a three-stage process. In the first stage, a substantially steady state electromechanical potential is induced into a piezoelectric member of an assembly. Typically this can be accomplished by applying a DC voltage across the crystal for long enough period of time for it to achieve a substantially steady state mechanical distortion. In the second stage, the electromechanical potential of the piezoelectric actuator is discharged rapidly but incompletely. The third stage begins with the abrupt termination of the rapid-discharge stage, thereby causing the crystal, and the voltage produced across it, to oscillate and decay freely. The voltage across the crystal continues to decay slowly in the third stage, and the oscillations continue to decay in magnitude as well, providing a relatively complex signal from which features can be extracted and compared to those of known-good devices.

Abstract: A flat panel display is based on a new switching technology for routing laser light among a set of optical waveguides and coupling that light toward the viewer. The switching technology is based on poled electro-optical structures. The display technology is versatile enough to cover application areas spanning the range from miniature high resolution computer displays to large screen displays for high definition television formats. The invention combines the high brightness and power efficiency inherent in visible semiconductor diode laser sources with a new waveguide electro-optical switching technology to form a dense two-dimensional addressable array of high brightness light emissive pixels.

Abstract: In a first state of an optical switch, a structure in the switch confines an optical mode to propagate along a first, unswitched path. The switch is switched into a second state by reducing the refractive index along the first path, or by increasing the refractive index of a region of the switch outside but adjacent to the first path, until the index within the first path is lower, preferably substantially lower, than that of the adjacent region. This creates an anti-waveguiding section in which light is forced to diverge from the unswitched path both by diffraction and refraction. The refractive index change is produced thermo-optically or electro-optically, for example. In a symmetric planar embodiment, upon actuation, light escapes from the confinement region into two beams deflected symmetrically in lateral directions while remaining vertically confined.

Abstract: When a PCI-bus controller receives a request from a PCI-bus master to transfer data with an address in secondary memory, the controller performs an initial inquire cycle and withholds TRDY# to the PCI-bus master until any write-back cycle completes. The controller then allows the burst access to take place between secondary memory and the PCI-bus master, and simultaneously and predictively, performs an inquire cycle of the L1 cache for the next cache line. In this manner, if the PCI burst continues past the cache line boundary, the new inquire cycle will already have taken place, or will already be in progress, thereby allowing the burst to proceed with, at most, a short delay. Predictive snoop cycles are not performed if the first transfer of a PCI-bus master access would be the last transfer before a cache line boundary is reached.

Abstract: A thermo-optic switch is operated in a novel near-impulse mode in which the drive pulse width is shorter than twice the diffusion time of the switch. The drive pulse width is less than the rise time of the steady-state optical response and also less than the rise time of the deflection efficiency response to the applied drive pulse. The drive pulse can further include a sustaining segment following the initial short pulse segment, if it is desired to maintain the switch in an ON state for a longer period of time. A number of additional techniques are described for further reducing the response time of the switch. An array of thermo-optic switches operated in this manner can form a display which, due to the fast individual switch rise times, can operate at an overall fast refresh rate.

Abstract: A redundant optical connection system is manufactured in specially prepared form to allow optical connections to be made at a later step. In response to information specifying which of the optical sources are functional, further structure may be activated or introduced into the connection system which guides optical energy to optical outputs from only those of the sources that are functional. In one aspect of the invention, the preliminary form includes primary guiding structures coupling each of a plurality of primary optical sources to a respective application structure, and a secondary guiding structure coupled to a secondary optical source and terminating without yet coupling to any application structure. If the information indicates that one of the primary optical sources is non-functional, then structure can be added or activated which transfers optical energy from the secondary guiding structure into the primary guiding structure corresponding to the non-functional source.

Abstract: Induction heating apparatus has a series inductor between an AC source and a parallel tank circuit.

Abstract: An imporoved, integrated circuit memory device is disclosed. Programmable read only memory (PROM) is combined with a programmable output circuit. The output circuiry can be programmed individually to provide a combinatorial logic signal or a registered logic signal output.

Abstract: A programmable array logic device including a programmable logic array, at least one register pair, a multiplexer coupled to the register pair so that they can share a common I/O pin, and an observability buffer for controlling the multiplexer. A dual clock buffer is provided so that registers within the register pair can be clocked singly when in a preload mode or together when in a logic or verification mode. When in the logic mode, either the output of a buried state register or an output register is observed at the I/O pin under the control of a product term generated by the logic array. When in the preload mode the register to be preloaded is selected by an externally provided preload select signal. In the verification mode, which typically follows a programming mode, individually selected product terms within the logic array can be observed by clocking them into the register pairs.

Abstract: An adjustable sense amplifier circuit for read/write control of solid state memory devices is described. In a write mode the circuit includes a write select path, coupled to a current source and coupled to a differential pair of data select transistors, wherein the input data state sets each of two differential pairs formed by the memory element cross-coupled latch, such that the memory element stores selected data. In a sense mode, a second current path is selected wherein an adjustable sense level is provided to each of two differential pairs formed by the memory element. The current source is coupled to a reference voltage source which is independent of the supply voltage. The reference voltage source tracks changes in temperature and also provides low beta compensation for current loss due to the low beta value of transistors in the write and sense paths.

Abstract: An integrated circuit device for protecting the circuitry of an integrated circuit from an electrostatic discharge into an output pin of the chip is disclosed. In a preferred embodiment, the device comprises an n-well, n-channel, polysilicon-gated FET structure, which operates in a punch-through mode, coupled to an output pad and an output buffer of the circuit. Back biasing in the chip system affords additional inhibition to turn-on during normal system operation.