Abstract: A system used to provide a verification check of a credit card or credit document includes a large capacity read/write memory having a single binary data bit stored at each address location. The credit card has unique identifying information encoded on it for addressing a specific location in the memory. A readout is provided in response to the insertion of the credit card to indicate whether the card is a valid one or not. To program the memory initially, a provision is made for individually addressing each of the different memory locations and to establish a "valid" or "non-valid" binary data bit storage at each location corresponding to a different credit card. In addition, manually operable addressing switches are provided to change the specific bit stored at any given address subsequent to the initial storage of data in the memory.

Abstract: A solid-state electronic wristwatch with a digital display includes additional circuitry to permit utilization of the display and the source of constant frequency signals of the watch to expand its operation to a calorie calculator. The calorie calculator components include a counter circuit for entering a count indicative of caloric intake, circuitry for entering calorie expenditure rate in terms of calories expended per hour, and a main calorie counter into which the calorie input information is entered and from which counts representative of calories consumed are removed at a rate determined by the calorie expenditure rate entered into the system. The watch display may be activated to display the calories being added, the calorie expenditure rate, and the net calories unconsumed on demand by the user. The watch also, if desired, may include a calendar display which also shares the common digital display elements used to display the time and calorie information.

Abstract: A frequency selective detector circuit is useful as a high/low pass detector or as a bandpass detector. The high/low pass detector comprises a pair of digital missing pulse detector circuits or resettable one-shot multivibrators that are connected together in cascade between a source of input pulses and the detector circuit output. The timing interval of the first missing pulse detector circuit in the cascade is less than the timing interval of the second missing pulse detector circuit in the cascade. By combining two such circuits to supply their outputs to a coincidence gate, a bandpass detector circuit results.