Patents Represented by Attorney Westman, Chapman & Kelly
  • Patent number: 7105926
    Abstract: A flip chip substrate is provided, which includes a plurality of conductive layers, including a top layer and a bottom layer. A first plurality of contacts, including first and second contacts corresponding to a differential signal pair, are arranged on the top layer within a die bonding area. A second plurality of contacts, including third and fourth contacts corresponding to the differential signal pair, are arranged on the bottom layer. First and second traces are routed between the first and third contacts and between the second and fourth contacts, respectively, wherein the second trace is routed out of the die bonding area on a different layer than the first trace. The traces are routed in a manner that reduces the length difference between the traces.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: September 12, 2006
    Assignee: LSI Logic Corporation
    Inventors: Arun Ramakrishnan, Anand Govind, Farshad Ghahghahi