Abstract: A method and apparatus for contact testing a plurality of devices under test, either sequentially or simultaneously. In a first test phase it is determined whether the test probe to each contact is shorted to the most negative rail. In a second phase it is determined whether the test probe has made proper contact, and whether ESD diodes on the devices under test are functional. In both test phases a negative pulse is generated on a tester bus and applied to the contact by the test probe. In the first test phase the positive rail of the device under test is grounded; in the second test phase the positive rail of the device under test is made positive. The negative rail of the device under test is connected to the negative rail of the tester. In both test phases, upon termination of the negative pulse, the bus is restored to a positive voltage which is dependent upon the condition of the contact and the condition of expected input devices at the contact.

Abstract: A pet car seat includes a base, a back separable from and connectable to the base, two posts separable from and connectable to spaced apart openings in a front edge of the base, and a net that connects to one side of the back, wraps around the posts, and connects to another side of the back. The net is removably connected to the sides of the back. The pet car seat is placed on a passenger seat in an automobile and the automobile's seat belt is passed through openings in handles extending behind the back thus securing the pet car seat in the passenger seat. A pet is confined to the base of the pet car seat by the net but not restricted from movement within the base. An additional measure of protection is obtained from a harness about the pet and removably fastened to a connector positioned on a front side of the back, the harness having reflective portions.

Abstract: An amplifier is constructed having a FET formed in a substrate with its gate coupled to a first voltage terminal. A second FET formed in the substrate is coupled both to the first FET and to a second voltage terminal. The second FET has its gate directly coupled to its body. The second FET electrically isolated from the substrate. An input node at the coupled gate-body receives an input signal. An output node between the first and second FETs outputs a signal in response to the input signal.

Abstract: An optical scanning holography system which requires only a two dimensional scan to record three dimensional information from a fluorescent specimen wherein the optical scanning holography is based on scanning the specimen with a Fresnel zone pattern and detecting and decoding the fluorescent light reflected from the specimen. The flourescent light reflected from the specimen contains three dimensional information about the specimen so that once the fluorescent light is detected and decoded a three dimensional image of the specimen can be obtained and displayed using only the two dimensional scan.

Abstract: The optical module has a semiconductor light emitting device, a lens, a holder for the device and the lens, and a receptacle core onto which a ferule of a counter optical plug is to be fitted. When the optical plug is connected, the semiconductor light emitting device is optically coupled with an optical fiber in the ferule by the lens. A step portion which forms a circular opening with setting the optical axis as the center axis and which eliminates coupling undesired light is disposed at a position which is on an emission side of the lens with respect to a contacting position of the holder and the lens. Preferably, the optical module satisfies the following expressions:0.9<.phi./(NA.times.L.sub.1)<1.3 and L.sub.2 <L.sub.1 /2where .phi. is a diameter of the circular opening, NA is a numerical aperture of the optical fiber, L.sub.1 is a distance between an opening end on the side of the lens and the optical fiber, and L.sub.

Abstract: Input data is partitioned and organized by building a sequence of predefined data structures corresponding to respective data models, each having a different organization and including pointers for propagating input data or data from a preceding data structure therethrough. Each data structure also includes fields for data values which may be input by a user or computed from other data stored therein and pointers referencing instances in a previous data structure in the sequence of data structures. As applied to the production of schematic drawings of cables connecting portions of a large and complex system with a high uniformity of style, such as to ANSI standards, the data is organized by unit, connector and pin priority and in prioritized groups of nets or subnets and partitioned into sheets for rendering in a standardized format.

Abstract: A circuit actively monitors and measures the amount of MOS device degradation due to, for example, the hot electron effect, and makes compensatory adjustments to device voltage levels or clock speed to maintain desired levels of functionality and performance. Monitoring can be done separately for NFET and PFET devices to selectively adjust for different degradation rates between the two. In operation, the monitor circuit compares the performance of a stressed device to a reference device, that is, an unstressed device which has not been degraded by the hot-electron effect. The monitor circuit outputs a signal indicating the amount of device degradation. This signal is used to adjust the supply voltage to that device or to the chip or otherwise compensate for the degradation. The monitor circuit can be formed on-chip or off-chip.

Abstract: A method for decreasing the pitch of polysilicon fuses uses tungsten barriers formed adjacent to the fuse elements. The tungsten barriers are made compatible with the process to form a crack stop by stacking tugsten at the via level on top of the tungsten at the contact level in the crack stop. An interlevel dielectric is used as a cover for the fuse.

Abstract: A memory design which facilitates incremental and store requests off an applied base address request increases the bandwidth of cache via the use of an internal address generation facility built into the memory's decoding circuitry. The introduction of an internal address generation facility simplifies extraneous control of typical requesters built into a memory system. The memory design also reduces power consumed by requests which exploit the memory's internal address generation facility. Power consumption is further reduced while maintaining memory access times by selectively gating data bits vital to the memory's logic flow at an earlier stage in the memory when the gating or steering address bits are known in advance of the data arriving to that stage.

Abstract: A circuit for detecting delay of more than a set period of time from a last signal transition for any of a plurality of data signals, comprising a differential comparator, and integrator pairs for each signal, one integrator of the pair being triggered by transition of the signal from low to high and the other triggered by transition of the inverse of the signal from low to high, each integrator having a voltage measured by the differential comparator against a reference voltage, each integrator being reset by the trigger for the other integrator.

Abstract: An adjustable tooling pin for a bed-of-nails test fixture used for testing circuit boards (cards) is provided which allows the tooling pin, and thus the card, to be precisely realigned while the card is still mounted in the test fixture. The adjustable tooling pin mechanism comprises a pivot bushing having a channel running from end-to-end into which a slide bar fits. The tooling pin projects from the end of the sliding bar in the z-direction such that a card may be located over the tooling pin. A locking screw fits through an aperture in the sliding bar and the pivot bushing and is threadably engaged into a threaded insert in the test fixture top plate. Hence, the tooling pin, and thus the card, are radially adjustable in the x-y plane by turning the pivot bushing and by sliding the sliding bar along the pivot bushing channel.

Abstract: Each base station transmits a signal including its own identification code. A cordless phone generates a plurality of pair information corresponding an identification code to a detected reception level based on a signal from each base station, selects pair information having largest reception level from among said plurality of pair information, and estimates a base station base on the pair information corresponding to the selected reception level. The cordless phone comprises a display section for displaying an estimated base station.

Abstract: In a semiconductor device having a metal wiring conductor connected to a contact hole formed through an interlayer insulator layer formed on a lower level circuit, a lower level tungsten film is deposited under a condition giving an excellent step coverage so as to fill the contact hole, and an upper level tungsten film is further deposited under a condition of forming a film having a stress smaller than that of the lower level tungsten film. The metal wiring conductor is formed of a double layer which is composed of the lower level tungsten film and the upper level tungsten film, and therefore, has a reduced stress in the whole of the film. Thus, there is obtained the tungsten film wiring conductor which fills the inside of the contact hole with no void and therefore has a high reliability, and which has a low film stress. In addition, the number of steps in the manufacturing process can be reduced.

Abstract: Disclosed is a method for forming a resist pattern in which a chemically amplified resist which has a photosensitive acid-generating agent with a catalytic function is used, has the step of: treating the surface of nitrided metal film or nitrided semimetal film deposited on a substrate by using a substance that reduces the basicity of a basic substance which exists on the surface of nitrided metal film or nitrided semimetal film or which is chemically coupled with the nitrided metal film or nitrided semimetal film.

Abstract: A method for making a semiconductor device, includes steps of: forming a lower wiring on a semiconductor substrate; forming layer insulation film to cover the lower wiring; coating a surface of the layer insulation film with organic or inorganic SOG to form SOG film; heat-treating the SOG film; etching the SOG film to even a surface of the SOG film; forming an aperture reaching through the SOG film and the layer insulation film to the lower wiring; and filling the aperture with a conductive material to form a through-hole, wherein the coating step with the organic or inorganic SOG is conducted in amine system gas atmosphere.

Abstract: A method and system are disclosed for selectively altering the functional characteristics of a data processing system without physical or mechanical manipulation. A data processing system is first manufactured having a predetermined set of functional characteristics. A multibit alterable code which includes a functional characteristic definition is then initially loaded into physically secure, nonvolatile memory within the data processing system, utilizing an existing bus, or a fusible link which may be opened after loading is complete. The functional characteristic definition is loaded from nonvolatile memory into a nonscannable register within a secure portion of a control logic circuit each time power is applied to the data processing system and the definition is then utilized to enable only selected functional characteristics.

Abstract: An object of this invention is to provide a disk player in which a plurality of disks different in diameter are driven, and can be identified with high accuracy. Disclosed is the disk player, a digital signal processing section applies to a CPU a synchronization signal which is raised to high level when the frequency of a detection signal outputted by a laser pickup reaches a predetermined value which permits a data reading operation, and a sense signal which is raised to high level when the frequency of the detection signal is shifted from a predetermined frequency. The CPU operates to rotate a spindle motor, and to brake the latter when the synchronization signal is raised to high level. The CPU further operates to detect a period of time which lapses from the time instant the motor is braked until the sense signal is fallen to low level, and to identify the loaded disk from the period of time thus detected.