Abstract: A multilayer microelectronics module formed by laminating together individual thermoplastic polymer sheets formed by injection, compression or other suitable molding techniques. Metal pieces to form vias of a desired shape and size are inserted into the molded sheets, preferably by in situ insert molding. The vias provide an electrical connection from the top to the bottom surfaces of the sheets.
Type:
Grant
Filed:
April 3, 1992
Date of Patent:
November 9, 1993
Assignee:
International Business Machines Corporation
Inventors:
Arthur Bross, Robert O. Lussow, Thomas J. Walsh
Abstract: Experiments have been conducted which demonstrate that gel optical density is a linear function of the fibrin fiber mass/length ratio (.mu.) and that the slope of the linear function is dependent on the concentration of fibrinogen in the sample. Once the linear function is known, knowledge of a gel optical density at one wavelength is adequate to determine .mu.. Such measurements allow quantitative monitoring of fibrin structure, and are clinically relevant.
Type:
Grant
Filed:
October 5, 1990
Date of Patent:
June 2, 1992
Assignees:
Center for Innovative Technology, Virginia Commonwealth University
Abstract: A multiplier comprises first and second squaring circuits each including first and second MOS transistors having their sources connected in common and third and fourth MOS transistors having their sources connected in common. The first and third transistors have a first gate W/L ratio and have their drains connected to each other, and the second and fourth transistors have their drains connected to each other and have a second gate W/L ratio different from the first ratio. Gates of the first and fourth transistors are connected to each other, and gates of the second and third transistors are connected to each other. A first input signal is supplied to the gates of the first and fourth transistors of each of the first and second squaring circuits, and a second input signal is supplied, without being inverted, to the gates of the second and third transistors of the first squaring circuit, and without being inverted, to the gates of the second and third transistors of the second squaring circuit.