Abstract: A field effect transistor (FET) with a vertical gate and a very thin channel sandwiched between source and drain layers. In a preferred embodiment of the invention, the FET is formed on a silicon on insulator (SOI) substrate with the silicon layer serving as the first layer (e.g., the source layer). A low temperature epitaxial (LTE) process is used to form a very thin (e.g., 0.1 .mu.m) channel, and a chemically vapor deposited polysilicon layer forms the top layer (e.g., the drain layer). An opening is etched through the three layers to the insulator substrate and its wall is oxidized, forming a gate oxide. Polysilicon is deposited to fill the opening and form the vertical gate.

Abstract: A microcomputer having a high speed access memory and a language processing program execution system capable of producing a compact object including a high speed variable operation is disclosed. As to an input source program, variable areas used by subroutines are calculated by a variable area analyzing part, and a flow graph of an interrelation of callings of the subroutines is produced by a flow graph producing part. Then, the maximum variable area used by a whole program is calculated from the sizes of the variable areas and the flow graph by a maximum variable area detecting part. When the calculated maximum variable area size of the whole program is smaller than the memory size of the high speed access memory, an output part outputs the object information with variables allocated in the high speed access memory.

Abstract: A microprocessor is provided with one input/output port per bit including a decoder 6 for determining whether or not a bit assigned to the input/output port is selected for a procesing operation in an output mode, and a processing circuit 12 for processing an operation that has been designated. The processing circuit 12 comprises at least one processing element for processing supplied 1-bit data for the processing and/or output latch data held inside the processing circuit itself. The processing element is selected by separately inputted processing information for outputting processed data. A masking circuit outputs the processed data from an output terminal only when an output signal from the decoder 6 indicates that the bit assigned to the input/output port is selected.

Abstract: A pupil function analyzer has three major subsystems; an electro-optical system, an electronic interface system and a computer/software system. The electro-optical system can, in turn, be described in terms of three subsystems; one that delivers controlled lights to the patient's eyes, another that forms images of the two pupils on a television camera, and a third that moves the optics to maintain alignment with the patient's eyes. The electronic interface system converts signals from the television camera into digital signals to be read by the computer and also responds to the computer to move motors for the maintenance of optical alignment and also operates the light stimuli. The computer/software saves and analyzes the signals sent by the electronic interface, controls the alignment motors, and provides an operator interface, so that the operator can select tests and examine the results.

Abstract: A method for specifying and executing independent, multi-media tasks along a synchronizing time-line, preferably in the form of a spreadsheet matrix with the event elements making up the rows and the time periods the columns. The media include various pieces of hardware such as touch screens, voice synthesizers, video disk players, and the like. In designing a presentation, the author types into the matrix indications of which piece of hardware will be operating and for what specified period of time during the presentation. This information is also accessible to all other events in the presentation thereby allowing complex multi-media presentations to be designed by a user who is relatively unsophisticated in using computers.