Abstract: A fabrication method for semiconductor devices connecting a multi-crystal semiconductor thin film and a semiconductor region including a high density of an impurity formed in a single crystal semiconductor substrate. After forming a N-type semiconductor region as the emitter by ion implanting, for instance, as into a P-type semiconductor region as the base, a polysilicon thin film 114 is deposited so as to be implanted with As ions and then heat treated. In this case, an amorphous portion of the N-type semiconductor region and an amorphous silicon thin film in contact therewith are transformed by solid phase epitaxial growth so as to form a single crystal semiconductor region, a single-crystalline silicon thin film, and a polysilicon thin film, thus forming a bipolar element having an emitter.
Type:
Grant
Filed:
July 12, 1991
Date of Patent:
March 22, 1994
Assignee:
Matsushita Electric Industrial Co., Ltd.
Inventors:
Shuichi Kameyama, Atsushi Hori, Hiroshi Shimomura, Mizuki Segawa