Abstract: A circuit consisting of five cascaded binary coded decimal, UP-DOWN circuits with associated gates, a first input causes the counters to count up, at a 10 Mhz rate until any second input, which latches into memory the accumulated time in the counters, and causes the counters to count down at 5 Mhz rate, when the counters reach zero an output pulse, suitable for triggering photo flash strobes is generated.

Abstract: A junction field effect transistor is fabricated in crystalline silicon by using oppositely doped polysilicon as the gate (POSFET). The depletion region of the pn (or np) junction formed at the polysilicon/silicon interface is used as the gate electrode to modulate the current path through the silicon channel from source to drain, the source and drain contacts may either be conventional metal or polysilicon heavily doped of the same conductivity type as the single crystal silicon substrate.