Abstract: An enclosure apparatus provides for combined air and liquid cooling of rack mounted stacked electronic components. A heat exchanger is mounted on the side of the stacked electronics and air flows side to side within the enclosure, impelled by air-moving devices mounted behind the electronics. Auxiliary air-moving devices may be mounted within the enclosure to increase the air flow. In an alternative embodiment, air-to-liquid heat exchangers are provided across the front and back of the enclosure, and a closed air flow loop is created by a converging supply plenum, electronics drawers through which air is directed by air-moving devices, diverging return plenum, and a connecting duct in the bottom. In a variant of this embodiment, connecting ducts are in both top and bottom, and supply and return ducts are doubly convergent and doubly divergent, respectively. Auxiliary blowers may be added to increase total system air flow.

Abstract: Described is a novel implementation of a medium and high frequency on-module (off-chip)/on-chip power noise filter for power noise sensitive circuits. To achieve this, a second order low-pass approach is used. The first stage capacitor is located on-module (off-chip), and the second stage capacitor is implemented on-chip.

Abstract: One or more processing units are connected with a clock component (comprising a clock) over a bi-directional serial link, and data frames are transmitted between the clock component and the processing units. The clock component may contain a serial link combination circuit for combining multiple processing unit serial links, operating in parallel, into a single serial link connected to the clock. Both of the clock component and the processing units contain an error detection and correction mechanism which examine and modify data within the data frames to perform error detection and correction. The clock component optionally contains an external interface for connection to a command-issuing Service Processor.

Abstract: A dynamic reconfiguration request for a change in a system's physical configuration is transmitted from a configuration controller to a hypervisor controlling operating systems executing in one or more partitions of the system. The hypervisor translates the physical reconfiguration request into a request for reconfiguration of logical resources known to the operating systems, first verifying it against an installation policy, and passes the requests to the operating systems in the partitions. The operating systems perform logical reconfiguration, then request physical reconfiguration of the hypervisor. The hypervisor initiates the physical reconfiguration through the configuration controller.

Abstract: A Test Operation-Code (TSTOP) instruction pre-verifies the validity of a target instruction op-code prior to execution of the target instruction. The pre-verification function, contained within CPU execution unit microcode, sets a return value in a program status word to indicate one of four conditions:1. The target instruction is present and operable;2. The target instruction is present in the computer system, but unavailable on this central processor (e.g. an asymmetric feature).3. The target instruction is not present in this computer system.4. The TSTOP op-code is recognized, but the target instruction presence cannot be determined.The return value is testable by the program issuing the TSTOP instruction to determine whether the target instruction should be issued.

Abstract: An extension of the two phase commit protocol allows distributed participation among physically distant agents independent of the communications mechanism being used in a data processing system. An extra stage of processing is added to the two phase commit protocol called End Phase One Processing (EPOP) which enables a distribution of the coordinator function across systems using any communication mechanism. EPOP is an extra stage in which a participant can receive control. In this extra stage, a participant flows two phase commit protocol sequences to distributed systems. The communication mechanism is used in such a way that it becomes part of a distributed coordinator. The coordinator itself does not need knowledge of other systems. The extra stage of processing is enabled by an operating system service called Enable End Phase One Exit Processing (EEPOEP). EEPOEP causes an extension of two phase commit protocol to be used on the issuing system.

Abstract: A workload manager creates an in storage representation of a set of performance goals, each goal associated with a class of clients (e.g., client transactions) in a client/server data processing system. A set of servers, providing service to the clients, are managed to bring the clients into conformity with the class performance goals by: calculating performance indexes for each class to determine the target class(es) which are farthest behind their class performance goals; analyzing the relationship among servers and client classes to determine which servers serve which classes; determining which resource(s) are impacting the service provided to the key servers (that is, those on which the target class(es) are most heavily reliant), and projecting the effect of making more of these resources available to those servers; and, finally, making the changes to those resources which are projected to most favorably indirectly affect the performance of the target class(es).

Abstract: A data processing system includes central storage where access to data is by central storage addresses. Instructions normally include a logical or virtual address which is translated to a real central storage address using dynamic address translation (DAT) with or without an access register (AR) translation mechanism. When in AR mode, and with DAT on, addressing of instructions or data in central storage can be effected by specifying real central storage addresses and eliminate the DAT and AR translating process.

Abstract: A workload manager creates goal control data, defining two or more classes of system work units, in response to specification of goals of two or more goal types for the classes, and specification of importance values for each of the goal types. A system resource manager causes the goals to be met by periodically sampling work unit status; calculating a performance index for each class; selecting a receiver class to receive improved service based on the relative performance indexes and goal importance; a system bottleneck impacting achievement of goal by the receiver class is identified; and one or more system control data elements are identified and adjusted to cause the goal to be met for the receiver class.

Abstract: A source computer program is analyzed and transformed into a directed graph file comprising a function list file, listing all functions (nodes) in the directed graph file, and a function call list file, listing all calls between said functions (arcs). A hierarchical graph analysis (HGA) function: calculates a "node reach" for each node--comprising the set of all nodes which may be reached from the node in question; produces a node display threshold value--indicating the maximum node reach to be displayed; and uses the node display threshold value to produce an HGA directed graph--comprising only those nodes to be displayed. Finally, a display function displays the HGA directed graph. Optionally, the node display threshold value may be modified after the display, and a new HGA directed graph produced and displayed.

Abstract: A data processing system, having virtual addressing capability, has a real storage manager to associate virtual storage locations with real storage by accessing page tables to determine the locations of "backed" virtual storage pages in central, expanded, or auxiliary storage. The real storage manager accepts requests to copy ranges of virtual storage from one virtual storage range to another, and, in so doing, uses the page tables to effectively perform the copying by reassigning backed pages from the source range to the target range. Having been reassigned to the target range, the backed pages are artificially aged by increasing the unreferenced interval count (UIC), so that the backed pages in the target range will be likely candidates for page stealing.

Abstract: Two or more user applications executing on one or more processors, each controlled by an operating system, share use of a list structure within a Structured External Storage (SES) facility to which each processor is connected. One of the applications registers interest in particular state transitions affecting one or more lists within the list structure, causing a process within the SES to notify the appropriate processor when a list operation causes the particular state transition, without interrupting processing on the processor. The application receives notice of the state transition by periodically polling a vector within the processor, or by receiving control when a test by the operating system of a summary indicator for the vector causes an application exit to be driven.

Abstract: An I/O request time limit value is set in a request-based, device-based, data-set-based, or workload-based time limit field, for transactions performing I/O operations to I/O devices in a data processing system. A scan routine compares the total time for the I/O request (including waiting time and retry time) against the appropriate time limit(s), and terminates the I/O request if the time limit is exceeded. If an active I/O request is interrupted as a result of an I/O error, retry is prohibited if the total I/O request time (including retry time) exceeds the appropriate time limit, or is within a threshold value of the appropriate time limit.

Abstract: The physical memory of a computer may not be directly accessable to the operator during the operation of a program due to the operational requirements of the operating system. Direct access to the physical memory of the computer during such operation may be possible through the aliasing of the physical memory locations and the creation of virtual alias addresses which will then give operator the necessary control to directly access any memory location thereby permitting the debugging of the program.

Abstract: A dynamic capability exchange mechanism permits two processing entities to notify each other of initial properties, or processing capabilities, as well as subsequent changes to those properties or capabilities. Before requesting a service, or function, of the other entity, one entity consults a mutual characteristic field (constructed from the current properties, or characteristics) to determine if the service, or function, is jointly available. A transport layer, acting as the communication mechanism between the two entities, provides for bidirectional communications between entities including a Control Program and a Service Call Logical Processor. The transport layer provides multiplexing, priority, failure, pacing, and buffer spanning support.

Abstract: A technique, specifically apparatus and an accompanying method, for use in, e.g., a "host" operating system (610), for properly updating a dynamically alterable channel program that controls an input/output (I/O) device so as to emulate a "guest" computer system, that employs dynamic address translation (DAT) in an I/O channel sub-system (150), on a "host" computer system (10) that does not. This technique performs this updating in a manner that significantly increases channel throughput so as to substantially reduce a performance degradation that would otherwise result from a lack of channel DAT on the host system. Specifically, our technique relies on program controlled interrupt (PCI) chaining coupled with use of "just-in-time" translation of each new virtual channel program segment generated by a guest operating system (620) and corresponding updating of channel program (415) then executing on the host computer system.

Abstract: A logically partitioned data processing system has a policy defining responsive actions to be undertaken by a process in one partition because of a monitored failure of an operating system in another partition. When such a failure occurs, the monitoring partition, if authorized, automatically communicates with a hypervisor to initiate the responsive actions on the failing partitions to reset and/or reconfigure that failing partition. Communication of action request between the partition and the hypervisor is accomplished without operator intervention, through a Service Call Logical Processor interface.

Abstract: A shared coupling facility contains system lock management (SLM) means for supporting a distributed locking protocol used by a plurality of sharing lock managers each executing on a processor having access to the shared memory and to any other processors in the processor complex. A request to lock a resource shared among the lock managers is first checked against a local hash table and then, if necessary, forwarded to the system lock management means in the shared memory for synchronous or asynchronous processing. List structures are maintained in the shared coupling facility to support the protocol, and are used by the system lock management means to record data recovery status. The sharing lock managers interact with the SLM means to control/manage lock contention, waiter queueing, and compatibility processing.

Abstract: A data processing system operates under the control of a control program having one or more versions. System dump data is generated on occurrence of an error condition. A dump analysis routine for analyzing dump data indicative of the error state of the system receives constant-format data from a version of a translation routine, the translation routine having one or more versions each corresponding to a version of the control program, and capable of translating the system dump data into the constant format required by the dump analysis routine.

Abstract: A Structured External Storage (SES) device/processor is connected to two or more DP systems, thereby loosely coupling the systems. The SES is capable of holding data objects of two distinct types (List objects and Cache objects), and communicates commands and command responses with the systems using a message protocol. A support facility within a processor on which a system is executing receives status indications from the SES without interrupting mainline system execution. Within the SES, a serialization mechanism allows more than one command to execute in parallel without loss of data object integrity, or command consistency. A forward completion mechanism sends to systems early notification of completion of certain commands, without permitting results inconsistent with this notification to be obtained by the systems. And a restart mechanism permits interrupted commands to be restarted by the initiating system or, in certain cases, by another system.