Patents Represented by Attorney William Craig Fuess

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  • ECC Check bit generation using through checking parity bits
    Patent number: 4345328
    Abstract: Apparatus for and method of providing single bit error correction and double bit error detection using through checking parity bits. A coding scheme is implemented which uses through checking parity bits appended to each byte as check bits. The remaining check bits are generated such that the combination of through checking parity bits and remaining check bits together provide single bit error correction and double bit error detection.
    Type: Grant
    Filed: June 30, 1980
    Date of Patent: August 17, 1982
    Assignee: Sperry Corporation
    Inventor: Gary D. White