Abstract: A monolithic semiconductor power device. The device is designed to produce high energy density and high power level RF/Millimeter wave radiation using the quasi-optical spatial power of an array (100) of small amplifiers (200) on a solid state wafer (300). Each cell (200) of the array (100) contains a reflection amplifier (206) that receives radiation and retransmits the signal back into the approximate same direction from which it was received. The radiation exiting from the array (100) is physically like a reflection that has been modified by the individual amplifier's characteristics. The exiting amplified radiation leaves the array (100) as a coherent wave front (110). The individual amplifier elements are fabricated on a monolithic solid state wafer (300). Rather than being diced into individual amplifiers, the elements are electrically connected together with proper biases and ground levels on the actual solid state wafer.
Abstract: The present invention relates to an improved electrical interconnection assembly adaptable for creating electrical connections between spaced-apart sections of a high performance missile assembly. Because the electrical connection must extend outside the missile, a plurality of electrical interconnections are integrally formed within a protective housing that is, itself of aerodynamic configuration. The cables may take the form of flat wires, or printed wire assemblies integral with the housing. Pre-stressed foam is formed in the housing to insulate the electrical interconnections. Wire mesh is preferably mounted in the housing between the interconnections and the outside of the housing to protect the interconnections from Electro-magnetic Interference (EMI).
Abstract: An improved driver design including a plurality of NPN bipolar driver transistors connected in an H configuration including at least one bipolar upper drive transistor. A novel circuit is included for driving the upper NPN bipolar driver transistor. In a particular implementation, the circuit for driving the upper bipolar drive transistor is adapted to sense the output of the drive transistor and regulate a voltage at the input thereof in response thereto to keep the drive transistor out of saturation. Thus, power dissipation is minimized by using an H configuration and high speed is afforded by using bipolar drive transistors and by keeping the drive transistors out of saturation.
December 15, 1992
Date of Patent:
March 1, 1994
International Business Machines Corporation
Abstract: A static RAM cell in which the load devices are moved from the state nodes to outer nodes of a cross-coupled pair of transistors in first and second driver elements (33 and 35). Each driver element has a first (T1A or T3A) and a second (T1 or T3) transistor and a resistive device (42 or 44). Each transistor has first, second and third terminals, with the second terminals being the input terminals. A first terminal of the first transistor (T1A) of the first driver element (33) is connected to the resistive element (42) at a first node. A first terminal of the first transistor (T3A) of the second driver element is connected to the resistive element (44) at a second node. A first terminal of the second transistor (T1) of the first driver element (33) is connected to the resistive device (42) at a third node. A first terminal of the second transistor (T3) of the second driver element is connected to the resistive device (44 ) at a fourth node.
Abstract: A heat transfer device for use with a heat sink in removing thermal energy from an integrated circuit chip. The inventive device includes a first membrane of flexible, thermally conductive material having a first surface in contact with the integrated circuit chip. A flexible, thermally conductive radial finger contact spring is disposed in contact with a second surface of the first membrane. A second membrane of flexible, thermally conductive material is included. The second membrane has a first surface in contact with the spring and a second surface in contact with the heat sink.
December 16, 1992
Date of Patent:
December 14, 1993
International Business Machines Corporation
Robert J. Bellar, Sung J. Kim, Alan L. Murphy
Abstract: The present invention (10) substantially overcomes many of the problems associated with prior art error detection codes by providing a novel approach to detecting and correcting multiple bit errors. The invention (10) organizes the data word into a matrix of n by m bits, where n is the number of m bit groups. Parity bits are generated for each column and each row and used to detect single, double and triple bit errors.
Abstract: A preconditioning circuit for use with an output buffer. The invention includes circuitry for detecting the output level of the buffer and for increasing the output level of the buffer when the output thereof is below a predetermined level or decreasing the output level of the buffer when the output thereof is above a predetermined level.
Abstract: A unitary full body exercise suit is disclosed. The invention is a one piece garment including a pair of shorts with two thigh portions for covering at least part of the thigh of a user integrally connected to an upper body portion which covers a substantial portion of the abdomen of the user. A set of pockets adapted to receive a weight are included, one on each thigh portion of the shorts.In the more specific embodiment, the invention is constructed of synthetic rubber and further includes belt loops between the upper body portion and the lower body portion adapted to receive a belt therebetween. The belt loops are comprised of straps which further support the weights in the pockets. The straps are sewn into the suit. Look and loop type fasteners are provided at the top of each of the pockets. Shoulder straps are included on the upper body portion of the suit.
Abstract: A trellis coded multilevel differential phase shift keyed mobile communication system. The system of the present invention includes a trellis encoder for translating input signals into trellis codes; a differential encoder for differentially encoding the trellis coded signals; a transmitter for transmitting the differentially encoded trellis coded signals; a receiver for receiving the transmitted signals; a differential demodulator for demodulating the received differentially encoded trellis coded signals; and a trellis decoder for decoding the differentially demodulated signals.
Abstract: A single, relatively simple, circuit which provides programming supply voltages for the programming circuits of a typical PAL type programmable logic array with minimal die size requirements. The invention includes a voltage charge pump circuit for providing a first voltage on a first output bus in response to a first supply voltage and an input pulse. The first output voltage provided on the first output bus is greater than the first supply voltage. The invention further includes a first circuit for switching the first supply voltage onto a second output bus in response to a first set of programming signals. A second circuit is included for switching a second supply voltage onto a second output bus in response to a second set of programming signals.
Abstract: A program verification circuit and technique adapted for use with a programmable logic array having at least one logic gate and first and second inputs thereto. A unique and novel operation is afforded by the present invention in that a method is provided of verifying the program of a field programmable logic array having a logic gate and at least first and second inputs thereto. The method of the invention includes the steps of: a) shifting verification control data through a shift register; b) selecting the first input of the logic gate by applying a first control signal to the first input of the logic gate in response to the output of the shift register; and c) deselecting the second input of the logic gate in response to the output of the shift register. A particularly novel aspect of the invention is provided in that the step of shifting verification control data through the shift register includes the steps of providing a first control signal (e.g.
Abstract: An inexpensive, reliable, accurate, high speed powder dispensing apparatus is disclosed which includes a barrel for transferring powder from a first retainer to a second retainer. The barrel is vibrated to cause the powder to translate on a surface thereof. The vibration is controlled to cause a measured amount of powder to be dispensed. In a specific embodiment, two barrels are included to provide coarse and fine rates of powder dispensation. A specific embodiment includes a scale for weighing the discharged powder. The scale is equipped with a sensor, the output of which is used to control and limit the rate of powder flow up to a preselected amount. A additional novel feature of the invention is the use of a mechanism to assist in overcoming the inertia of the scale.The invention provides an inexpensive, reliable, accurate, high speed powder dispensing apparatus. As the need to rotate barrels of the prior art is eliminated, the likelihood of occasional jamming is minimized.
Abstract: An adaptive reference voltage generation circuit. The invention generates a reference voltage for a sense amplifier to provide bias voltages for cells in a PAL type programmable logic array. The circuit of the invention includes a reference cell having characteristics substantially similar to the cells of the array. A reference voltage supply circuit is included for providing a reference voltage in response to any changes in the characteristics of the reference cell. In accordance with the method of the invention, the reference cell is programmed and erased whenever the cells in the array are programmed and erased. Thus the characteristics of the reference cell change in accordance with changes in the characteristics of the cells of the array.
Abstract: A CMOS translator which includes an amplifier having an input node and an output node; a first clamp for providing a clamped feedback signal from the output node to the input node of the amplifier; and a second clamp for providing a clamped feedforward signal from the input node to the output of the amplifier. ECL signals are translated up to CMOS voltage levels with high speed, low power consumption via a circuit with requires minimal die area. The unique clamping arrangement provides a self-biasing feature which affords a large error margin.
Abstract: An inexpensive, reliable, accurate, high speed powder dispensing apparatus is disclosed which includes a barrel for transferring powder from a first retainer to a second retainer. The barrel is vibrated to cause the powder to translate on a surface thereof. The vibration is controlled to cause a measured amount of powder to be dispensed. In a specific embodiment, two barrels are included to provide coarse and fine rates of powder dispensation. A specific embodiment includes a scale for weighing the discharged powder. The scale is equipped with a sensor, the output of which is used to control and limit the rate of powder flow up to a preselected amount. An additional novel feature of the invention is the use of a mechanism to assist in overcoming the inertia of the scale.The invention provides an inexpensive, reliable, accurate, high speed powder dispensing apparatus. As the need to rotate barrels of the prior art is eliminated, the likelihood of occasional jamming is minimized.
Abstract: An improved cable clamping apparatus is disclosed. The apparatus is adapted for use in a cable actuated power drive mechanism having a cable and a cable drive mechanism. In a preferred embodiment, the improved cable clamping apparatus includes a coupling element for moving a mass in response to the movement of the cable. A particularly novel aspect of the invention is the provision of a cable clamp attached to the coupling element for clamping the cable such that the coupling element moves in response to the movement of the cable. The cable clamp is generally L-shaped with an integral first section and dual U-shaped second sections each adapted to receive the cable therein. In a specific embodiment, the dual U-shaped sections of the clamp are separated to receive and retain a cable collar therebetween. In a further more specific embodiment, at least one U-shaped section of the clamp is adapted for fastening with an appropriate fastener to enclose a portion of the cable therein.
Abstract: A technique for designing trellis codes to minimize bit error performance for a fading channel. The invention provides a criteria which may be used in the design of such codes which is significantly different from that used for average white Gaussian noise channels. The method of multiple trellis coded modulation of the present invention comprises the steps of: (a) coding b bits of input data into s intermediate outputs; (b) grouping said s intermediate outputs into k groups of s.sub.i intermediate outputs each where the summation of all s.sub.i,s is equal to s and k is equal to at least 2; (c) mapping each of said k groups of intermediate outputs into one of a plurality of symbols in accordance with a plurality of modulation schemes, one for each group such that the first group is mapped in accordance with a first modulation scheme and the second group is mapped in accordance with a second modulation scheme; and (d) outputting each of said symbols to provide k output symbols for each b bits of input data.
Abstract: An integrated circuit antenna structure for transmitting or receiving millimeter and/or submillimeter wave radiation having an antenna relatively unimpaired by the antenna mounting arrangment is disclosed herein. The antenna structure of the present invention includes a horn disposed on a substrate for focusing electromagnetic energy with respect to an antenna. The antenna is suspended relative to the horn to receive or transmit the electromagnetic energy focused thereby.
Abstract: An improved coupled waveguide laser array which provides a set of in-phase, phase locked optical beams is disclosed herein. The improved laser array of the present invention includes first and second coupled cavities for providing first and second beams in a first direction, respectively. The first and second cavities have substantially parallel longitudinal axes and apertures at first ends thereof for emitting the first and second beams. A mirror is mounted in a plane transverse to the longitudinal cavity axes and includes a first partially transmissive section mounted in optical alignment with the first cavity. The mirror further includes a first substantially reflective section mounted in optical alignment with the second cavity.