Abstract: An electrostatic discharge (ESD) protection circuit in a semiconductor integrated circuit (IC) having protected circuitry. In one embodiment, the ESD protection circuit includes a pad, adapted for connection to a protected circuit node of the IC, and an ESD protection device, which is coupled between the pad and ground. A diode turn-on device is coupled in a forward conduction direction from the pad to a first gate of the ESD protection device. In a second embodiment, the ESD protection circuit is an SCR having an anode coupled to a first voltage supply line, and a cathode coupled to ground. A parasitic capacitance is coupled between each the voltage supply line and the grounded cathode.
Type:
Grant
Filed:
March 15, 2002
Date of Patent:
July 27, 2004
Assignees:
Sarnoff Corporation, Sarnoff Europe
Inventors:
Markus Paul Josef Mergens, Cornelius Christian Russ, John Armer, Koen Gerard Maria Verhaege
Abstract: A radio frequency (RF) pulse power amplifier biased with a relatively low supply voltage generates one or more RF pulses having a relatively large output power. The RF pulse power amplifier may be configured as a push-pull power amplifier operating in class D mode including first and second sections, balanced-to-unbalanced (balun) transformer, and a load resistor coupled across the output winding of the balun transformer. Each section has a current source providing bias current, a MOS transistor, and a pair of bipolar transistors. Each section receives its input digital signal at the MOS transistor, which acts as a current switch for a bias current from a current source. With a relatively small voltage change in response to the input digital signal, the MOS transistor switches the bias current between itself and a transistor pair used to drive the corresponding half (input winding) of the balun transformer.
Abstract: Processing is applied to convert an input compressed video bitstream into an output compressed video bitstream having a different bit rate and/or representing different imagery from the input bitstream. The bitstream conversion processing is adjusted based on control parameters that are generated by comparing analogous measurements made to the input and output bitstreams so that subsequent measurements of the output bitstream will more closely match subsequent measurements of the input bitstream. In certain embodiments, the bitstream conversion processing involves decoding the input bitstream, optionally applying image processing functions to the resulting decoded video data, and re-encoding the resulting processed video data to generate the output bitstream.
Abstract: A method and apparatus for reducing channel distortion in a broadband, wireless network comprising a residential communications gateway that accepts all incoming communications signals and securely broadcasts those signals throughout a residence. In one embodiment, the gateway comprises a space time block encoder to reduce the effects of multipath and at least one error correction encoder to provide error correction. The space time block encoder generates at least two space time block coded signals that are transmitted via the wireless network. Each space time block coded signal is transmitted using a different antenna.
Type:
Grant
Filed:
March 13, 2001
Date of Patent:
June 22, 2004
Assignee:
Sarnoff Corporation
Inventors:
Yumin Zhang, Robert C. Malkemes, Charles Reed