Patents Represented by Attorney, Agent or Law Firm William J. Embida
  • Patent number: 6570799
    Abstract: A pre-charge and reference voltage technique operates on a DRAM memory array in which two additional rows of reference cells are added to the array. When the array starts the pre-charge cycle, the regular word line and latch P-channel bar signals both turn off and the complementary bit line pair is shorted together. These two lines charge share to create a half way voltage level (VCC/2) that is restored into the reference cell. After this voltage is restored into the reference cell, the bit lines are fully pre-charged to ground.
    Type: Grant
    Filed: March 14, 2002
    Date of Patent: May 27, 2003
    Assignees: United Memories, Inc., Sony Corporation
    Inventor: Michael C. Parris