Abstract: In a computing system, debug flags for software development, testing, and debugging of a module of the operating system are retrieved and set. The module under development is provided with a debugging message handler and a lookup table of debugging flags. The table maps the debugging flags to memory locations containing the present state of the flags. A debugging message is generated at the application-level by a user desiring to monitor or alter the state of the debugging flags. The debugging message handler decodes the debugging message using the table, and the module reports or alters the debugging flag accordingly. In this manner, real-time program evaluation and control can be achieved without the conventional debugging software packages.

Abstract: A flux enhanced data transducer and method for producing the same in conjunction with shared shields on MR read heads in which substantially between 500-2500 .ANG. of a relatively higher magnetic moment material is added to the upper surface of the shared shield, or bottom write head pole, prior to a magnetic flux containment ion milling operation utilizing the upper pole as a mask. The relatively higher magnetic moment flux enhancement layer may comprise CoNiFe, FeN or similar material which is deposited prior to the formation of the dielectric gap layer. The flux enhancement layer may then be selectively removed substantially surrounding the upper pole by means of a relatively brief ion milling process in which only on the order of 1.0 k.ANG. of the layer need be removed and during which only an insignificant amount of the material removed might be re-deposited on the sides of the upper pole.

Abstract: A directory system directs cache line access requests from processors in a multi-processor system with a shared memory system through a cache line states directory. The cache line states directory stores a state value that identifies a cache line shared states word. The cache line shared states word identifies the processor that owns the cache line and the state of access of each processor that shares access to the cache line. A state value encoder encodes a cache line shared state word into a state value and loads the state value into the cache line states directory. A state value decoder decodes the state value into a cache line shared state word for use by the cache line directory system in retrieving the cache line. A plurality of cache line tables are used with each cache line assigned to one of the tables. The cache line table stores a state value for each cache line shared states word stored in the table.

Abstract: A tool for batch processing the definition of air bearing surfaces on rows comprising a plurality of sliders is disclosed. The tool has a main body member having a length defining a y-axis direction, a width defining an x-axis direction, and a thickness defining a z-axis direction. The main body member has a top surface defining an upwardly facing z-axis base surface. The main body also defines a y-axis alignment reference surface, and an x-axis alignment reference surface. The rows are positioned on the tool for processing, where the upper surface of the platform engages the lower surface of the plurality of rows to provide proper z-axis positioning on the tool. The y-axis alignment reference engages one longitudinal side of an anchor row to provide proper y-axis positioning, and the x-axis alignment reference surface abuts the second end of the plurality of rows to provide proper x-axis positioning. The top surfaces of the rows lie in a common plane.

Abstract: Disclosed is an MR head, and the method of making the same, which has a pole/shield. In the preferred embodiment, the pole side of the pole/shield is constructed such that it has a length that is approximately equal to the length of the pole, and a shield side that is approximately the length of a shield. Through this construction, the MR element, which is disposed between the shield side and the shield, is fully shielded during a read operation. Additionally, the flux lines generated during a write operation approximate the length of the pole so that excessive fringing does not occur. As a result of the smaller flux lines generated between the pole and the pole side of the pole/shield, data may be more densely packed on the disk used in conjunction with the MR head.

Abstract: A method for recovering data from a cache memory of a second storage controller by access to a cache memory of a first storage controller is presented. The storage controllers are coupled by a private common data path. The method includes copying metadata corresponding to the data stored in the cache memory of the second storage controller to the cache memory of the first storage controller through the private common data path. The metadata may include pointers to and the size of the data. After copying the metadata pointers, the data in the cache memory of the second storage controller is established in the cache memory of the first storage controller. As a result, the entire set of data does not need to be totally recovered to the hard disk before resuming host communications in a recovery operation, which may take a relatively long time.

Abstract: A countermeasure-detecting circuit, and associated method, for a laser speed detector. Countermeasures taken at a moving target, such as a vehicle, to interfere with operation of the laser speed detector are detected. When countermeasures taken at the moving target are detected, the sensitivity of the laser speed detector is altered to overcome the effects of the countermeasures.

Abstract: A highly precise range measurement instrument is made possible through the use of a novel and efficient precision timing circuit which makes use of the instrument's internal central processing unit crystal oscillator. A multi-point calibration function includes the determination of a "zero" value and a "cal" value through the addition of a known calibrated pulse width thereby providing the origin and scale for determining distance with the constant linear discharge of capacitor.

Abstract: Handle-based finding operations for search operations in an operating system in a computing system are converted into non-handle-based finding operations. The invention is responsive to a program module performing search operations specifying a file search path and has a find first module, a find next module and a find close module. The find first module, in response to a find first call from the program module, locates a search block for use in storing file identification information for a first file in the file search path. The find first module marks the search block as "in use," generates a handle identifying the search block and passes the handle back to the program module. The find next module is responsive to a find next call containing the handle. The find next module converts the handle into a search block address and locates the search block from the search block address. The search block is used to store the file identification information for a next file in the file search path.

Abstract: A circuit and method for concurrently addressing at least two rows of memory cells of a memory array of a memory device. By concurrently addressing at least two rows of memory cells during testing of the memory device during a burn-in period, the memory device can be tested in a reduced time period.

Abstract: A redundant array computer system having a high-speed CPU bus and lower-speed I/O buses, in which parity blocks are generated for a plurality of data blocks from multiple CPU bus logical channels in a randomly-interleaved manner to provide enhanced I/O transfer rates. For example, such a system may have two channels for processing two sets of data. The parity generation technique employs switching means to switch channels on the CPU bus between the first set and the second set, generating parity information that can be transferred independently over two I/O buses. The parity generation technique achieves an effective I/O bus transfer rate more closely matched to the speed of the CPU bus. The invention shares a single XOR gate and related support circuitry between multiple logical channels by providing a configurable electronic memory, thus achieving economies in implementation. For certain system applications, it may be desirable to utilize the RAM as a large, unified FIFO.

Abstract: A circuit and method for a memory device, such as a synchronous dynamic random access memory (SDRAM) having at least two memory banks. Columns of at least two memory banks are concurrently addressable to permit data to be written to, or read from, the at least two memory banks concurrently. By writing data concurrently to more than one memory bank, testing of the memory of the memory device can be effectuated in a reduced period of time. Data can also be written or read from a single bank in a multi-bank RAM without requiring that a particular bank be specified during a read/write command.

Abstract: A transducer includes a spin valve ("SV") structure comprising a pinned ferromagnetic layer adjoining a first end portion thereof and a freely rotating ferromagnetic layer adjoining an oppositely disposed second end portion thereof. First and second current conductors adjoin the first and second end portions of the spin valve structure respectively in a current perpendicular-to-the-plane configuration ("CPP"). In a particular embodiment disclosed herein, a differential CPP transducer includes a pair of SV structures having first and second current conductors with a common current conductor intermediate the SV structures.

Abstract: A method for forming a re-entrant photoresist lift-off profile for thin film device processing of particular utility in conjunction with self-aligned sputtered films, such as permanent magnet ("PM") films, for use in magnetoresistive ("MR") read heads as well as a device made thereby. Photoresist is patterned in a conventional manner upon the thin film layers overlying a suitable substrate and the photoresist is then exposed to a suitable developer resulting in photoresist regions having substantially vertical sidewalls. An electron beam, or other suitable energy source, is then utilized to cross-link (or render relatively insoluble) the upper portion of the positive tone resist image by accelerating a sufficient dose of electrons into the photoresist to a well controlled depth. A second electron beam is then distributed throughout the entire photoresist thickness to render the lower portion of it relatively more soluble in a developer.

Abstract: A laser based range finder which may be inexpensively produced yet provides highly accurate precision range measurements has a number of user selectable target acquisition and enhanced precision measurement modes which may viewed on an in-sight display during aiming and operation of the instrument. Extremely efficient self-calibrating precision timing and automatic noise threshold circuits incorporated in the design provide a compact, low-cost, highly accurate and reliable ranging instrument for a multitude of uses and is adaptable for both recreational and laser based "tape measure" applications.

Abstract: A magnetoresistive transducer and method for manufacturing the same includes a spin valve structure comprising a pinned, bottom ferromagnetic layer and an active, top ferromagnetic layer separated by a thin nonmagnetic metal spacer layer. The active ferromagnetic layer and underlying spacer layer are formed into a mesa structure having tapered opposing sides to promote better surface planarization in a thin film fabrication process. A pair of permanent magnet layer portions may be deposited at the end portions of the spin valve structure in a generally coplanar relationship to promote domain stabilization but may also be separated therefrom by a relatively thin separation layer. The magnetic read track width of the device can be accurately and reproducibly determined by photolithographically defining the spacing between the permanent magnet layer portions overlying the active ferromagnetic layer.

Abstract: A highly precise range measurement instrument is made possible through the use of a novel and efficient precision timing circuit which makes use of the instrument's internal central processing unit crystal oscillator. A multi-point calibration function includes the determination of a "zero" value and a "cal" value through the addition of a known calibrated pulse width thereby providing the origin and scale for determining distance with the constant linear discharge of capacitor.

Abstract: An automated window system and method for a building utilizes a pair of gas springs to bias a window panel outward from a corresponding frame. A force opposing the gas springs is supplied by a motor driven spindle selectively winding and unwinding a cord coupled to the window panel sash adjacent the jamb portion of the frame and window. The cord is slidably retained to the jamb portion of the window sash through a pair of threadable pulls in order to equalize the forces supplied opposing the gas springs in the event of uneven winding of the cord due to buffeting or other forces while the window panel is being moved between an "open" to a "closed" position thereof.

Abstract: An FSK detector circuit and method which may be utilized for the demodulation of a digital data signal from a modulated sine wave carrier signal. A simple, low parts count FSK detector is disclosed which is readily implemented as an integrated circuit for the detection of a digital data signal in wireless applications without the use of an associated phase locked loop or other frequency detection circuitry.