Abstract: A three terminal compensation network for frequency dependent attenuation has a control terminal, an input terminal, and an output terminal. The network is particularly useful for an off-premises CATV system for slope compensation of a broadband television signal. The control terminal is supplied with a voltage indicative of the amount and direction of the slope in the actual television signal. The voltage oppositely biases a set of diodes which are used as controlled resistances in a pair of tuned circuits in the network. One series tuned circuit provides for varying degrees of negative slope compensation and a parallel tuned circuit provides for varying degrees of positive slope compensation. The network elements are connected in a modified bridge T configuration such that the characteristic impedance of the CATV system (75 ohms) can be approximately matched for the input and output of the broadband television signal.

Abstract: A cable television radio frequency data processor for receiving and processing data transmitted from a cable television terminal to the headend of a cable television system comprises a plurality of data receivers for receiving the returned data, detectors associated with each receiver for providing an indication of received signal strength and a data processor. The data processor responsive to the data receivers eliminates redundant data and collects statistics on data throughput and, responsive to the detectors, collects statistics on received signal strength. The data processor then may initiate recalibration of transmit signal levels or an appropriate selection of data transmit channels as required.

Abstract: This invention discloses a new and improved method of scrambling video signals by inversion of the video information by splitting the sync pulse into plural portions and transmitting each portion of the sync pulse at a predetermined level. This improves the quality of the recovered video compared with other video inversion systems by rendering the video less sensitive to variations in the modulation depth of the modulator carrying the inverted signal, the demodulation sensitivity of the demodulator and the stability of the recovery circuits. The invention further provides additional security against pirating by allowing the scrambling circuit to operate in diverse modes, each of which will cause a TV to react differently should a conventional pirating device be employed. The invention also renders the signal capable of being transmitted with unmodified modulators of the type normally employed in the CATV industry.

Abstract: A laser diode protection circuit which monitors the r.f. modulation level of the input modulating signal to the laser diode and disconnects the laser diode from the r.f. modulating signal when it exceeds an acceptable level. The circuit further monitors the output of the d.c. power supply which provides the d.c. bias current to the laser diode. The circuit disconnects the laser diode from the r.f. modulating signal when the output of the power supply falls below an acceptable level.

Abstract: Volume control for use in a cable television set top converter or the like is calibrated for optimum television stereo channel separation. The volume control controls the volume to predetermined levels. One of the predetermined levels is a particular level calibrated for optimum stereo separation. An indicator on the converter indicates the optimum stereo separation volume level. When an internal VCR timer turns on the set top converter, the set top converter is forced to the optimum stereo separation volume level. The calibration is performed during manufacture and ensures that the indicated volume level for optimum stereo separation is indeed the optimum volume level.

Abstract: The present invention relates to an attachment (optical fiber sidecar) to the outer casing of a component of an RF distribution system, which provides a sealed enclosure in which one or more individual optical fibers may be separated from a main optical fiber transmission medium, and a conduit through which the individual fibers may be passed for connection to components housed in the RF casing.

Abstract: Tracking of a standard or non-standard input video signal, such as a NTSC or PAL composite video signal, is provided by supplying the phase difference between a horizontally-related subcarrier signal, and a variable horizontal sync signal, which is indicative of the SCH phase shift in the input video signal. The phase difference is used to generate a corresponding servo voltage, which then is used to steer the bias of a monostable and thus vary accordingly the trailing edge of a pulse generated thereby, to remove the phase difference. Thus the variable horizontal sync signal is made to coincide with the subcarrier signal, which forces the system to track the subcarrier-to-horizontal sync phase of the input video signal.

Abstract: A serial data communication system including a microprocessor and an asynchronous communication interface adapter (ACIA) implementing a SMPTE Supervisory Protocol for Digital Interface Control. The system detects the beginning of a break character as the first framing error which occurs after the last word of a data block has been detected. The receive clock of the ACIA is disabled in response to the start of break detection by the software reset of a bistable device which disables a receive clock gate. The framing error detection circuit of the ACIA is additionally disabled by the termination of the receive clock signal. The end of the break character is detected as the space to mark transition before the start of the first word in the data block. The receive clock is enabled by setting the bistable device with the end of break transition thereby detecting the termination of the break character and enabling the receive clock gate.

Abstract: A digital time base corrector for correcting time base errors of the digital samples of a video signal for all the various speed modes of a reproducing apparatus. The time base corrector is configured having a small capacity memory and a large capacity memory wherein the small capacity memory is divided into a first section and a second section. The first section of the small capacity memory retimes data samples for subcarrier phase errors without losing or repeating data, while the second section of the small capacity memory retimes data for horizontal frequency error without losing or repeating data in all reproducing modes except shuttle. Further, the second section of the small capacity memory in reverse and forward shuttle retimes the data for horizontal frequency and phase errors while equalizing the data rate through the time base corrector by selectively discarding or repeating horizontal lines based on line type.

Abstract: A time base corrector including a frame memory and a memory control. The memory control is microprocessor based and calculates the starting addresses of memory areas at which video data will be written to or read from the frame memory and the starting times of those sequences. The memory control receives information concerning the configuration of the time base corrector, the input video field sequence,the desired output video field sequence, timing components of the input and reference clock signals, TV standard, and operator commands to make these calculations. The results of the control are time base corrections for horizontal and vertical phase errors, horizontal and vertical positioning control, color frame sequencing, color correction of chroma phase, configuration delay adjustment, and other advantageous operations.

Abstract: Apparatus is disclosed for providing error compensation of a video information signal having a PAL format. Sampling of the analog PAL format video information signal is done at a rate of four times the chrominance subcarrier frequency and is done in a precise manner whereby the samples are taken along orthogonal vector axes that are oriented at 45.degree. relative to the U and V vector axis. When samples are taken at the prescribed locations, substitute samples in the form of multi-bit digital words can be used as replacements for defective or missing sample words, which replacement samples exhibit the same vector phase as the defective sample, but which are taken from either the preceding or succeeding line relative to the line in which the defective sample is located. The apparatus of the present invention obviates the necessity of performing any arithmetic computation to derive the value for the sample to be substituted. Moreover, the sample is spatially closely related to the defective sample, i.e.

Abstract: A proportional fuel fuel control (11) regulates the fuel flow (Wf) from a hydromechanical unit (36) based upon an error signal (E) representing the difference between a demanded speed signal (Nd) and an actual speed signal (Nh). The demanded speed signal (Nd) is generated by an integrator (32) as the time integral of the least of a plurality of acceleration terms (Aa, Ab, Ac, Ad) selected by a select low gate (38). The demanded acceleration term (Aa) is generated by junction (26) as the difference between the demanded signal (Nd) and a scheduled speed signal (Ngs). Stress acceleration terms (Ac, Ad) are generated by junctions (48, 50) and scheduling means (42, 44) which form stress limiter circuits. A stall acceleration term (Ab, is generated by a junction (46) and a scheduling means (40) which form a stall prevention feature.

Abstract: A microstrip antenna with a linearly polarized radiating patch is varied in resonant frequency by an electronic tuning technique. A dc bias voltage is combined with the excitation signal to regulate the capacitance of a varactor diode mounted in the antenna structure. In one embodiment the varactor is in shunt with a half wave open circuited radiator and adds electrical length to the antenna, while in another embodiment the varactor is in series with a shorted quarter wave radiator and subtracts electrical length therefrom.

Abstract: A differential pressure measuring system is disclosed. The system includes two quartz capacitive pressure transducers (14, 16). Each capsule contains a pressure sensitive capacitor (Csa, Csb) and a relatively pressure invariable reference capacitor (Cra, Crb). The pressure sensitive capacitors (Csa, Csb) are excited by out-of-phase signals, (Vr, -Vr) which further excite the reference capacitors (Cra, Crb), out of phase, respectively. The outputs of all capacitors are combined in a summing junction (22) whose output controls the count of a digital integrator (34). A closed loop is formed by converting the output of the integrator (34) to a negative feedback signal (lf) which is applied to the summing junction (22) through a feedback capacitor (Cf). The integrator (34) incrementally changes the feedback signal (lf) in a direction to balance the loop. At this point the output of the integrator (34) is representative of the measured differential pressure.

Abstract: The invention provides a pressure measurement system with a substantially constant settlement time. The invention includes a closed loop pressure measurement system having an input impedance configuration and a feedback impedance configuration where a signal from the feedback impedance configuration is used to null or balance a signal from the input impedance configuration. The error between the signals is integrated in a digital integrator to generate a measurement of the sensed parameter. The invention further comprises a means for varying the feedback loop gain of the system as a function of pressure in a manner to compensate for the gain change produced in the system in response to a pressure change.

Abstract: A proportional fuel fuel control (11) regulates the fuel flow (Wf) from a hydromechanical unit (36) based upon an error signal (E) representing the difference between a demanded speed signal (Nd) and an actual speed signal (Nh). The demanded speed signal (Nd) is generated by an integrator (32) as the time integral of the least of a plurality of acceleration terms (Aa, Ab, Ac, Ad) selected by a select low gate (38). The demanded acceleration term (Aa) is generated by junction (26) as the difference between the demanded signal (Nd) and a scheduled speed signal (Ngs). Stress acceleration terms (Ac, Ad) are generated by junctions (48, 50) and scheduling means (42, 44) which form stress limiter circuits. A stall acceleration term (Ab) is generated by a junction (46) and a scheduling means (40) which forms a stall prevention feature.

Abstract: An acceleration limit reset circuit (38, 40, 42, 44) is disclosed for a closed loop fuel control (11) of a gas turbine engine (10). The closed loop control includes a comparator circuit (28) which compares an acceleration term Ngs-Nd to a limit value Al and if the scheduled acceleration (Ngs-Nd) is in excess of the limit, regulates the rate of change of the engine speed to the limited value Al. The acceleration limit Al is scheduled by an accel/decel limiter circuit (30) as substantially equivalent to the surge line of the engine. The acceleration limit reset circuit (38, 40, 42, 44) is provided for modifying the acceleration limit Al during special operating conditions of the engine (10) by a signal RRS.

Abstract: A pressure ratio measuring system is disclosed. The system includes two quartz capacitive pressure transducers (16, 22). Each capsule contains a pressure sensitive capacitor (Csa, Csf) which is fed by an alternating excitation signal. Capacitance (Csa) is fed by excitation signal (Vr) and Capacitance (Csf) is fed out of phase by feedback excitation signal (-Vr f(N)). The outputs of the capacitance are combined in a summing junction (36) whose output is an error signal (Ie) proportional to the pressure ratio. A feedback loop (26) is closed through a register (30) and a multiplying digital to analog converter (32) to generate the feedback signal (-Vr f(N)). The feedback loop (26) integrates the error signal (Ie) by incremental changing the feedback signal (-Vr f(N)) with digital number (N) in a direction to null the loop. When the loop is nulled the digital number (N) is a representation of the ratio (Pa/Pb) of the pressure (Pa) sensed by capacitance (Csf).

Abstract: A digital speed measurement circuit for an engine includes a magnetic pick-up positioned adjacent an engine-driven gear having a substantial number of teeth so that the pick-up produces a number of speed pulses per revolution of the gear. These pulses are shaped into square waves by a signal conditioning circuit and connected through a synchronizing circuit which responds to the trailing edge of each square wave to produce a triggering pulse, with each triggering pulse supplied to a tooth counter. A high speed clock is connected to a second counter which is reset with each triggering pulse. Sampling pulses are produced in an associated control system which is not coordinated with the speed pulse but which are longer in duration than any of the speed pulses and which control the flow of tooth counts to the tooth counter.

Abstract: An acceleration limit reset circuit (38, 40, 42, 44) is disclosed for a closed loop fuel control (11) of a gas turbine engine (10). The closed loop control includes a comparator circuit (28) which compares an acceleration term Ngs-Nd to a limit value Al and if the scheduled acceleration (Ngs-Nd) is in excess of the limit, regulates the rate of change of the engine speed to the limited value Al. The acceleration limit Al is scheduled by an accel/decel limiter circuit (30) as substantially equivalent to the surge line of the engine. The acceleration limit reset circuit (38, 40, 42, 44) is provided for modifying the acceleration limit Al during special operating conditions of the engine (10) by a signal RRS.