Abstract: A voltage regulator for an anode voltage supply in a CRT powered by a deflection flyback pulse generator includes a voltage sensing network for providing a feedback signal to a summing amplifier. A pulse sensing network which may be a capacitive divider is connected between the output of the flyback pulse generator and the input to the summing amplifier. The resultant output of the summing amplifier is the flyback pulse level shifted with respect to a DC level which is applied to a MOSFET switch to turn it on whenever the flyback pulse goes above the MOSFET's threshold. The output of the MOSFET switches current through a shunt capacitor coupled to the output of the deflection flyback pulse generator for altering its capacitance thereby regulating the height of the flyback pulses, and thus regulating the anode voltage supply.

Abstract: A clock-delay circuit for a sinusoidal clock output includes a pair of current amplifiers, each connected to the clock output, wherein one of the amplifiers generates an amplified signal in phase with the clock output and the other generates a signal shifted in phase by 90.degree.. Both signals are multiplied by control signals to alter their respective amplitudes prior to summation of both multiplier outputs. The sum of the multiplier outputs will be a sinusoidal waveform whose phase depends upon the control currents in the multipliers which are set by the user. Thus, the circuit provides a user-controlled continuously variable delay for a sinusoidal clock.

Abstract: A processing circuit for a digital camera system enables capture of a visual event which falls within some user-defined range. A digital camera converts a target image into a set of digital data signals, each signal representing the brightness level of a pixel in a matrix. A memory stores a mask also comprising a matrix of pixels. As the digital camera scans the target image, each data pixel from the camera is compared to a corresponding pixel in the mask and differences in brightness between the two are counted. When the count reaches some predetermined valve, the current frame of video data is saved for further analysis and/or display.

Abstract: A digital pipelined heterodyne circuit includes sine and cosine function generators for generating m-bit digital coefficients and an m-stage digital multiplier for multiplying the coefficients by a digitized data input signal. A triangular shift register array connects the digital sine and cosine function generators with the multiplier stages and provides for simultaneous processing of successive bytes of input data at each multiplier stage by delaying the arrival of coefficient bits at each multiplier stage to coincide with the arrival of a predetermined data byte. This takes place simultaneously in all stages thereby decreasing the processing time by a factor of m.

Abstract: An active electrical test probe with wideband frequency capability for use on a test probe card, along with other test probes. A small hybrid integrated circuit is mounted on a substrate held on edge, adjacent the probe tip contact element of the probe, by a conductive metal clip. The circuit is provided power from an external source. Signals received by the probe tip are transmitted, as modified by the hybrid integrated circuit, through an output cable to electronic test equipment.

Abstract: A degaussing system for a CRT includes a voltage source, which is enabled by power-up of the CRT, coupled to a tank circuit including a degaussing coil and a capacitor. A voltage sensing network connected in parallel with the tank circuit senses the voltage across the capacitor and when that voltage rises to a predetermined threshold, and actuating signal is provided which turns on a latching switch circuit which enables a switch connecting the tank circuit to ground. This allows it to oscillate, taking the metal components of the CRT through a decreasing series of hysteresis loops as the oscillation decays. The latching switch circuit maintains the switch in an on position until power-down of the CRT, thus maintaining all except R1 which aids grid regulation of the components of the degaussing system, in a low voltage state until degaussing becomes necessary once again.

Abstract: A method and apparatus for measuring the width of pulses in the gigahertz range comprises the steps of splitting an input pulse and delaying one of the pulses prior to their recombination in a directional coupler. The recombined pulse is then measured in a power meter. By varying the delay, maximum and minimum readings from the power meter may be found. The pulse width may then be found as a function of the actual delay, which may be controlled by the user by varying the distance through a waveguide that the delayed pulse must travel.

Abstract: A temperature compensated amplifier network for a fiber optical receiver includes a photodiode having an optical input and a current output, and a cascadable transimpedance amplifier having N stages, each stage having a common base-emitter voltage. An emitter-follower transistor is coupled to the last stage of the transimpedance amplifier network and has a base-emitter voltage of the same magnitude but of opposite polarity from the base-emitter voltage of each of the amplifier stages. Any DC drift of the amplifier stages is therefore offset by a compensating drift in the opposite direction by the output emitter-follower.

Abstract: A dual channel time domain reflectometer includes a pair of input lines connected at respective nodes to a reference flat current pulse generator and a traveling wave sampling gate, respectively. The sampling gates are actuated by a balanced strobe generator which includes a waveguide coupler for coupling a high amplitude fast rise time pulse to each of the gates simultaneously. Pulses of requisite amplitude and shape are generated by a circuit responsive to a strobe trigger input which drives a step recovery diode.

Abstract: A method of focusing and calibrating a display screen which is coupled to a video camera where the display screen is not visible when performing the calibration. The method includes the steps of generating a reference signal to display an image on the display screen, capturing an image of the display signal in the video camera and converting the image into digital signals representing the brightness of pixels in a pixel matrix, analyzing the digital signals for data representing predetermined physical parameters of the visual display on the screen, and generating on a separate display screen a graphic representation of these physical parameters. By observing the bar graphs on a microcomputer at the same time that adjustments are made to the focus, intensity, and rotation controls on the oscilloscope, the display screen may be focused and calibrated.

Abstract: A signal processing circuit for enabling a computer to quickly scan a memory having stored signals which represent a video image includes a flag generator responsive to a lit pixel detector for providing a flag signal to the memory to be stored in an address location indicating the presence of at least one lit pixel in that row. Incoming video, which includes data and sync signals, is digitized and examined by the lit pixel detector and a flag signal is clocked into memory at a predetermined address. The computer scans these address locations, which lie in a single column, to determine the identity of rows having a flag signal. This eliminates the need for the computer to scan the entire address space to locate an object of interest.

Abstract: A probe for use in electrical circuit test equipment, in which a contact element is longitudinally slidable in an insulator sleeve which also contains an R-C attenuator circuit connected electrically to the contact element by an electrically conductive elastomeric material. A high impedance cable is connected electrically to the other end of the RC attenuator circuit by another piece of conductive elastomeric material. The cable connects the attenuator to another R-C circuit which, together with the attenuator, forms a voltage divider, and the attenuated signal controls an amplifier which provides a signal through a low impedance cable to a test equipment.

Abstract: A frame capture circuit for use with a video camera includes an analog-to-digital converter for converting composite video to digital form and a memory for storing sequential frames of digital video. The analog-to-digital converter is connected to the memory through a summer, and the memory has an output connected to a second summer input through a feedback loop. The feedback loop includes a switch controlled by a central processing unit such that when the switch is closed, the output of the memory is a composite video data frame comprising a current plus a previous frame of data. The central processing unit closes the switch whenever an event of interest displayed on an external device falls near the end of a frame of video generated by the camera so that the entire event is captured without regard to the scanning phase of the video camera.

Abstract: A calibrated automatic test system includes a test station for generating digital test function codes and a test head containing a plurality of I/O pins for connection to a device under test. Each I/O pin includes a pin electronics circuit responsive to the digital test function codes for providing test signals to the device under test. The pin electronics circuits are inexpensive CMOS IC's and lack the accuracy needed to test VLSI devices at the frequencies of interest. An external calibration unit is connected to each I/O pin and data measurements are taken which represent the performance of the CMOS IC's. The data measurements are converted to calibrated function codes representing desired data values which are then stored in correction memory circuits which respond to nominal digital test function codes and substitute in their places calibrated function codes which are then supplied to the pin electronics circuits.

Abstract: A sample and hold network samples an input data signal at a periodic rate by differentiating the input data signal and multiplying it in an analog multiplier by a strobe signal, whose spectrum extends to at most twice the highest frequency in the data input signal. The output of the multiplier is combined in a differential amplifier with the input data signal to provide an output having a slope which is zero and also equal to the input data signal at times that are integral multiples of the period of the strobe signal.

Abstract: An active load network for a device under test includes a logic circuit for anticipating the output state of the device under test and for turning on either a current source of a current sink to properly load its output. The current sink and current source each comprise a pair of CMOS transistors connected in series. One of each transistor pair turns on to either source or sink current and the other provides a variable impedance controlled by the voltage at its gate to regulate the amount of current. A pull-to-center transmission gate is also provided which pulls the output of the device under test to a level between a logic high and logic low when it is turned off.

Abstract: A modified BNC connector for connecting an active probe to an active probe to an electronic instrument includes a female BNC input on the instrument for cooperatively mating with the male BNC output of the probe. The female BNC input includes a flex circuit mounted on a planar surface and disposed about the periphery of its outer coaxial shield. A plastic bezel fits over the flex circuit to permit access to contact points located thereon and to mask the remaining area. The male BNC connector is located in a housing which includes a set of spring loaded telescoping pins which make contact with the flex circuit contact points. The housing includes a rotatable knob that locks the male and female portions together.

Abstract: A variable impedance driver network comprises a plurality of transmission gates connected in parallel between a voltage source and an output. Each transmission gate has a predetermined nominal impedance and by turning on selective gates the overall impedance of the network may be adjusted to match that required at the output.

Abstract: A method of manufacturing printed circuit boards includes injection molding a polymer component which may include a substrate for a printed circuit, forming circuit runs and circuit pads on the substrate with conductive adhesive, placing circuit components onto the circuit pads and curing the conductive adhesive. The adhesive may be silkscreened onto the polymer substrate. This process obviates the need for the large number of expensive manufacturing steps necessary to produce conventional etched fiberglass printed circuit boards.

Abstract: A bond wire connection between two semiconductor devices alleviates the problem of inductive loading at high frequencies by providing a capacitive effect which compensates for inductive reactance. The capacitive effect is provided by utilizing multiple parallel layers of bond wires at a common electrical connection point. As more layers are added the net impedance can be controlled so as to match the impedance driving the downstream semiconductor.