Patents Represented by Attorney, Agent or Law Firm William P. Skladony
  • Patent number: 6806943
    Abstract: A method and apparatus for clamping a semiconductor mask to a carrier device is taught. The apparatus is comprised of a base member to which is attached an elongated spring. Both the base and the spring have affixed to them a means for compressively contacting the mask surface when the mask is put in place. In the preferred embodiment, that contact means is made of sapphire shaped in the form of a dome. The clamp further includes an adjustment screw that can be used to adjust the height of the contact means affixed to the base member. In this manner, the surface of the mask can be adjusted so that it is planarized to the right orientation relative to an e-Beam or laser source that will be used to scribe a pattern on the mask. Finally, the clamp includes electrical contacts, and the materials out of which the clamp is made are deliberately selected, so that no electrical or magnetic forces can build up on the clamp or the wafer that might adversely affect the scribing process.
    Type: Grant
    Filed: August 9, 2002
    Date of Patent: October 19, 2004
    Assignee: International Business Machines Corporation
    Inventors: Wayne A. Barringer, David J. Pinckney, Joseph E. Santilli, Maris A. Sturans
  • Patent number: 5912901
    Abstract: A built-in self-test (BIST) apparatus and method for testing an integrated circuit are disclosed which enable capture of failure data for a selected failure. The BIST apparatus comprises a clock generator, which generates at least a first clock signal, and a built-in self-tester, which applies predetermined input data patterns to the integrated circuit in response to the first clock signal. In addition, the BIST apparatus includes a data comparator for comparing output data received from the integrated circuit with expected output data. The data comparator detects a failure within the integrated circuit when the output data received from the integrated circuit differs from the expected output data. The BIST apparatus further includes a clock controller that disables the first clock signal in response to the detection of a selected occurrence of a failure.
    Type: Grant
    Filed: March 24, 1997
    Date of Patent: June 15, 1999
    Assignee: International Business Machines Corporation
    Inventors: R. Dean Adams, Michael R. Ouellette, Ronald J. Prilik
  • Patent number: 5639334
    Abstract: A uniform gas flow is provided at the surface of a planar device or wafer in a processing system having a substantially cylindrical chamber through which processing gases flow toward an asymmetrically located outlet port by using an appropriately disposed collar or baffle along the gas stream in the chamber in the plane of the surface of the planar device or wafer.
    Type: Grant
    Filed: March 7, 1995
    Date of Patent: June 17, 1997
    Assignee: International Business Machines Corporation
    Inventors: Anthony John Canale, Randy Dean Cox, Dennis Stanley Grimard, Tracy Charles Hetrick
  • Patent number: 5635869
    Abstract: A constant-current generator circuit includes an output circuit and a control circuit, with the control circuit producing a control voltage to define a reference current through the output circuit. An important feature is that the control circuit uses a pair of transistors having different threshold voltages in generating the control voltage. The circuit is formed using CMOS technology, and the difference in threshold voltage may be produced by doping the polysilicon gate of an N-channel or P-channel field effect transistor. The step of doping to produce the change in threshold voltage is compatible with the standard processing for the CMOS device. In a preferred embodiment, the control circuit uses two pairs of control transistors, each pair having differing thresholds. One pair is P-channel and the other N-channel. These pairs are in parallel, the P-channel pair connected to the positive supply and the N-channel pair to the negative supply or ground.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: June 3, 1997
    Assignee: International Business Machines Corporation
    Inventors: Frank D. Ferraiolo, John E. Gersbach, Ilya J. Novof, Edward J. Nowak
  • Patent number: 5572209
    Abstract: A data processing system having a compression and decompression apparatus based on the Lempel-Ziv algorithm. The compression apparatus includes a history RAM unit for receiving and storing one or more data elements and a coding unit for determining whether received data elements previously have been stored in the history RAM unit and are a candidate for compression. If a received data element matches at least one of the stored data elements, an address of the matching stored data element is generated. The compression apparatus generates a compression token comprising an identification of whether a data element is compressed, the length of the coded data within a plurality of predetermined data length categories and an address. The decompression apparatus also includes a history RAM unit for storing received data elements and includes a circuit for receiving a compression token and determining the storage addresses of the next data element from the length and address information contained in the token.
    Type: Grant
    Filed: August 16, 1994
    Date of Patent: November 5, 1996
    Assignee: International Business Machines Corporation
    Inventors: Henry R. Farmer, Anne A. Wilson
  • Patent number: 5558795
    Abstract: An induction heating module encapsulation apparatus and method for its use is disclosed. The apparatus comprises a substantially airtight chamber which is composed of ceramic or some other high temperature insulating material in which a cap and a ceramic substrate having semiconductor chips joined thereon are placed. A sealband of solder or other brazing material is placed at the periphery of the cap where the cap and substrate are to be joined. An RF coil, which serves as inductor in the apparatus, the energized by a high frequency generator, generating an electromagnetic field in the radio frequency spectrum. The RF coil is oriented to localize the inducted current at the periphery of the cap and the sealband. The inducted current is dissipated in the form of heat until the sealband is molten. The RF power is then turned off.
    Type: Grant
    Filed: April 30, 1992
    Date of Patent: September 24, 1996
    Assignee: International Business Machines Corporation
    Inventor: Vlastimil Frank
  • Patent number: 5519579
    Abstract: The invention is a method for replacing integrated circuit chips directly attached on printed circuit boards, and a board and a replacement card module that may be used to practice the method. As the first step, the electronic component and the surrounding fan-out wiring area on the board is mechanically removed, e.g., by micro-milling, typically leaving a recess in the board. A card module having a replacement electronic component and associated fan-out wiring is attached in the recess of the board by common bonding agents. The card module is designed so that its fan-out wiring matches the removed fan-out wiring, and hence is adapted for attachment to the board wiring. After attaching the card module, the wiring of the board is electrically connected with the wiring of the card module by wire bonding, tape automated bonding or other appropriate solder techniques.
    Type: Grant
    Filed: December 8, 1992
    Date of Patent: May 21, 1996
    Assignee: International Business Machines Corporation
    Inventors: Peter Fink, Heinz G. Horbach
  • Patent number: 5504702
    Abstract: Disclosed is a DRAM cell which has a transistor and a cell capacitor for storing a charge. Additionally, the cell further includes a second capacitor for charge pumping the cell capacitor, the two capacitors being connected to a common junction. The second end of the charge pump capacitor, namely the end which does not share a common junction with the cell capacitor, is connected to a control line which is driven during writing so as to boost the storage voltage in the cell capacitor. Through this arrangement, the storage voltage of the cell capacitor can be boosted by means other than a word line boost.
    Type: Grant
    Filed: June 27, 1994
    Date of Patent: April 2, 1996
    Inventor: Toshio Sunaga
  • Patent number: 5410514
    Abstract: The present invention realizes page mode memory access in a single clock memory. A control signal PAGE, one level of which designates an ordinary mode and the other level of which designates a page mode, is provided to a single clock memory from the outside. A mode state identification circuit identifies four mode states, ordinary mode, page-in, during-page, and page-out, by decoding the combination of the control signal levels in two consecutive memory cycles. A memory control circuit part of a memory array is thereby controlled based on the result of the identification.
    Type: Grant
    Filed: March 21, 1994
    Date of Patent: April 25, 1995
    Assignee: International Business Machines Corporation
    Inventor: Hisatada Miyatake
  • Patent number: 5407349
    Abstract: An exhaust system for use with a high temperature furnace used to perform oxidation and/or annealing operations of the type used in semiconductor fabrication. The exhaust system is designed to permit the furnace to be used with a controlled environment chamber surrounding the entry to the process chamber of the furnace. The exhaust system allows a relatively high velocity flow of exhaust gas from the process chamber through the exhaust system to occur when a positive pressure (e.g., annealing) operations are performed. Such high velocity flow prevents (a) backstreaming and (b) the accumulation of non-uniform concentrations of exhaust gases in the exhaust system, thereby permitting the accurate monitoring of the concentration of a selected gas in the exhaust system. Based on such monitoring, the opening of the door to the process chamber of the furnace may be prevented when the concentration of the selected gas exceeds a predetermined level.
    Type: Grant
    Filed: January 22, 1993
    Date of Patent: April 18, 1995
    Assignee: International Business Machines Corporation
    Inventors: Richard R. Hansotte, Jr., Dieter K. Neff, Dennis A. Rock, Jeffrey A. Walker, Roland M. Wanser
  • Patent number: 5401675
    Abstract: A process for sputter deposition wherein high aspect ratio apertures are coated with conductive films exhibiting low bulk resistivity, low impurity concentrations, and regular morphologies. A collimator is used having an aspect ratio that approximates the aspect ratio of the apertures.
    Type: Grant
    Filed: March 24, 1993
    Date of Patent: March 28, 1995
    Inventors: Pei-Ing P. Lee, Thomas J. Licata, Thomas L. McDevitt, Paul C. Parries, Scott L. Pennington, James G. Ryan, David C. Strippe
  • Patent number: 5382483
    Abstract: A phase-shifting mask with self-aligned spacers of phase-shift material adjacent to the edges of the opaque mask pattern and a method for making the same is disclosed. The method of the invention deposits a blanket layer of an appropriate phase-shift material over a transparent mask substrate having a patterned opaque layer followed by a removal step which forms the spacers. The mask is preferably comprised of a quartz substrate covered with a patterned chrome layer fabricated following the normal inspection and repair procedure. A layer of phase-shift material is then blanket deposited. The thickness and index of refraction of the phase-shift material is chosen to provide a phase-shift of 0.67 pi radians (120 degrees) to pi radians (180 degrees) in the completed mask which is the range of phase-shift demonstrated to be effective. The phase-shift layer is then blanket etched anisotropically in a Reactive Ion Etch (RIE) chamber, using the chrome and quartz as etch stops.
    Type: Grant
    Filed: January 13, 1992
    Date of Patent: January 17, 1995
    Assignee: International Business Machines Corporation
    Inventor: Malcolm A. Young
  • Patent number: 5373893
    Abstract: A method and apparatus for cooling thermally massive parts includes directing a chilled gas onto an electrical component travelling on the belt of a continuous furnace. The belt is divided into a series of hot and cold zones to provide thermal stressing to the electrical component to detect early life failure. As the component cools, a constant thermal stress is maintained by either lowering the temperature or increasing the flow rate of the chilled gas.
    Type: Grant
    Filed: October 19, 1992
    Date of Patent: December 20, 1994
    Assignee: International Business Machines Corporation
    Inventors: David E. Eisenmann, Peter M. Elenius, James M. Leas, Wagih M. Wazni
  • Patent number: 5362663
    Abstract: A high density substrate plate DRAM cell memory device and process are described in which a buried well region is formed adjacent to deep trench capacitors such that the substrate region of DRAM transfer FETs can be electrically isolated from other FETs on a semiconductor substrate. The buried region is partially formed by ion implantation and diffusion to intersect the walls of the deep trenches.
    Type: Grant
    Filed: June 4, 1993
    Date of Patent: November 8, 1994
    Assignee: International Business Machines Corporation
    Inventors: Gary B. Bronner, Sang H. Dhong, Wei Hwang
  • Patent number: 5274210
    Abstract: This disclosure relates to laser bonding electrical components having conductive elements which are naturally reflective of the laser beam wavelength. Component leads or pads which are made of copper or have a gold coating, for example, will reflect the wavelength of an Nd:YAG laser, making it difficult to form physical and electrical bonds using the laser bonding technique. In preferred embodiments, the conductive elements are coated with a non-flux, non-metallic, coating material which is less reflective of the laser energy than the conductive elements, making it possible to efficiently use a laser to accomplish bonding.
    Type: Grant
    Filed: March 2, 1993
    Date of Patent: December 28, 1993
    Assignee: Digital Equipment Corporation
    Inventors: Gary M. Freedman, Maurice P. Brodeur, Peter J. Elmgren
  • Patent number: 5265229
    Abstract: An interleaved output queue is used as a high performance interface on a system bus for transferring information from a CPU to main memory. The queue is loaded on its input side with information that is bound for transmission from the CPU's cache to main memory. The queue itself is logically divided into those queue entry addresses which are either odd or even. On its output side, the queue is unloaded by dual sets of unload circuitry, each of which accesses the information stored in either the odd or even queue entry addresses. Other select circuitry will alternate the transmission of information out of the two sets of unload circuitry to main memory. Each set of unload circuitry receives error information back from main memory during the time that the other unload circuitry is issuing a transaction.
    Type: Grant
    Filed: July 2, 1990
    Date of Patent: November 23, 1993
    Assignee: Digital Equipment Corporation
    Inventor: Bimal K. Sareen
  • Patent number: 5233616
    Abstract: This invention relates to a write-back cache which is protected with parity and error correction coding ("ECC"). The parity and ECC codes are generated by a memory interface when data is transferred by main memory to the central processing unit ("CPU") associated with the cache. Thus, all data originating in main memory will be parity and ECC encoded when it passes through the memory interface, and the data, and its related parity information and ECC codes will be stored in the cache. On the other hand, data which is taken from the cache and modified by the CPU during its processing operations is also transferred to the memory interface for ECC encoding. Thus, all data modified by the CPU is also protected, and the modified data, and its related parity information and ECC codes are also stored in the cache.
    Type: Grant
    Filed: October 1, 1990
    Date of Patent: August 3, 1993
    Assignee: Digital Equipment Corporation
    Inventor: Michael A. Callander
  • Patent number: 5210829
    Abstract: This invention relates to a tape drive with an electronic buffer which temporarily stores data transferred between the host computer and the tape drive's magnetic tape. More specifically, during a write transaction, in which data is transferred by the host computer to the tape drive for storage, the present invention involves the buffer having an adjustable threshold, or "watermark", which must be reached by the data stored in the buffer before the tape drive begins the operation of ramping the tape up to its write velocity so that it can record the data stored in the buffer. To the extent that the rate at which data is sent to the tape drive from the host computer may vary, the adjustment of the watermark by the tape drive is for the purpose of locating the watermark that is optimal for the data input rate at any given point in time. It does so with its chief objective being the maximization of the tape drives availability to accept data from the host computer whenever the host is ready to send data.
    Type: Grant
    Filed: December 12, 1990
    Date of Patent: May 11, 1993
    Assignee: Digital Equipment Corporation
    Inventor: Haim Bitner
  • Patent number: 5184281
    Abstract: This invention relates to a heat dissipation apparatus for cooling a number of heat generating electrical components mounted on a printed circuit board, some of which components are arranged in pairs, each pair being separated by a space. The apparatus includes two heatsinks positioned such that the parallel, thermally conductive walls of the heatsinks are adjacent to the heat transfer surfaces of the components. Disposed within the space separating a given component pair is a pressing fastener which has a yoke with a V-shaped recess into which is positioned a wedge. The positioning of the wedge in the recess is adjusted by means of a screw, resulting in the tines of the yoke spreading as the wedge is drawn within the recess. As the tines spread, they engage the paired components pressing them in contact with the heatsink walls.
    Type: Grant
    Filed: March 3, 1992
    Date of Patent: February 2, 1993
    Assignee: Digital Equipment Corporation
    Inventors: Victor M. Samarov, Zeljko Arbanas
  • Patent number: 5175410
    Abstract: The present invention involves a hold-down fixture which is usable in connection with bonding an integrated circuit package to a printed circuit board in a surface mount environment. The purpose of the fixture is to hold each of the leads of the package in intimate contact with corresponding contact pads on the printed circuit board during the bonding process. The fixture includes a base with two bars for each group of leads extending from the perimeter of the housing of the package. Together the bars compressively force the entire foot of each lead to set flatly against its pad. The bars are spaced such that an aperture, which is defined by an opening through the base and positioned between the bars, can admit a bonding means, such as a laser beam, to reflow a solder composition at the lead/pad junction. Accordingly, with the leads compressed against the pads by the bars of the fixture, and with the reflow of the solder composition by means of the laser, a good bond between each lead and pad will be formed.
    Type: Grant
    Filed: June 28, 1991
    Date of Patent: December 29, 1992
    Assignee: Digital Equipment Corporation
    Inventors: Gary M. Freedman, Maurice P. Brodeur, Peter J. Elmgren