Abstract: A television receiving system includes a digital unit, which has at least one single-instruction multiple-data processor, especially suited for television processing. The processor receives data samples of each horizontal line word-serially, but processes the line in parallel. The processor has input, computational, and output layers that operate concurrently. Internal register files emulate line memory to eliminate the need for external line memories. The processor may be programmed with various improved definition television tasks, downloaded to it from a host development system. Field memories and multiplexers control the data flow so that a sub-picture and a full size picture may be displayed at one time.