Abstract: A test vehicle a system and method for evaluating an interconnect module manufacturing process while dynamically testing performance with high-speed operational frequencies is disclosed. An interconnect module designed at many of the manufacturing process limits offers complete and fast failure analysis so that manufacturing defects can be quickly located and the process improved. Failure analysis, particularly on 90 nm technologies and beyond is becoming extremely difficult. At-speed testing is also becoming very important to the yield and reliability of products. This invention incorporates a self-timed speed circuit that can detect subtle resistive faults and also show the exact location in the array where the speed fault occurred based on test program datalogs from scan flip flops.

Abstract: A pyroelectric detector with significantly reduced microphonic noise sensitivity that includes a pyroelectric detector element constructed from a z-cut LiNbO3 or LiTaO3 electret. Selective domain reversal is accomplished in the electret by applying an electric field. Electrodes are attached to either surface of the electret spanning the domain reversed region and a portion of the original domain region to create areas of equal and opposite sensitivity. The detector is mounted in an electrically grounded container or housing. The detector may also be constructed having multiple detector regions to accommodate resonant acoustic frequencies of the electret, to function as a position sensor, or both. In other words, the position sensor has multiple domain regions that also accommodate acoustic frequencies. The detector may also be constructed having domain reversed regions placed on the electret in a periodic pattern having a geometry and spacing that is related to the acoustic impulse response of the electret.

Abstract: A material flow design system for a mixed-model demand flow manufacturing line is presented. The material flow system utilizes a replenishment card/replenishment container system of material management. The material flow design system defines the size of replenishment containers and the location of material deduct points in the production path. The material flow design system may further include a design system for designing an inventory control system. The inventory control system involves locating backflush and intermediate backflush locations on the production path and deduct points in the material flow sequence. An inventory monitoring system monitors material flow, deducts material from inventories at deduct points, and credits material to inventory indicated by the deduct points when products produced by the manufacturing line flow through material backflush points defined in the manufacturing line.

Abstract: Disclosed is a fluid mixer that mixes liquids while simultaneously promoting rapid mixing entrainment of vapor in the liquid. The device includes a vertical rotor mounted centrally on a base assembly. The rotor comprises a tube which is hollow from an open top end to a bottom closed end, having an external screw thread in a right-side configuration relative from top to bottom and one or more holes located in the sidewall of the tube at the bottom of the hollow portion of the tube, preferably located centrally between two flanking surfaces of the screw thread. The base assembly comprises a stirbar and a supporting disk which contains a ceramic magnet. The base rests on the floor of a containment vessel. A magnetic stirring motor is centrally located sufficiently close to and beneath the containment vessel as to achieve magnetic flux coupling with the base magnet. Operation of the mixer develops a liquid vortex in the liquid phase material.

Abstract: Disclosed is a system for using an antenna array in conjunction with a GPS receiver to receive GPS satellite transmissions. A switching circuit, under the control of a GPS controller, can vary the sampling rate of multiple antennas in the antenna array to ensure that multiple satellite information is acquired. The device of the present invention can be implemented in handheld cell phones, personal data assistants, telemetric devices or any device using a GPS receiver that may be used in various orientations so as to receive GPS satellite transmissions from multiple directions. More highly directional antennas can be employed having higher gain since the antenna array can receive satellite data from multiple orientations.

Abstract: Disclosed is transmission of a signal over a single interconnect between functional blocks of the IC. A scaled or encoded signal responsive to a first digital signal is generated by summing currents responsive to the first control signal. The summed currents, which may be the sum of one or more currents, is the scaled signal. The encoded signal is transmitted over a single interconnect. This transmission occurs in one clock period in contrast to the at least two clock periods required to serially transmit data. The encoded signal is then used to generate a second digital signal. The generation of the second digital signal preferably includes mirroring the current of the encoded signal. The mirrored current is can then generate one or more separate voltages which are used to generate the second digital signal.

Abstract: An apparatus and method are disclosed for generating timing pulses to control various functions in a video monitor including the switching of video amplifiers in cathode ray tube (CRT) devices, the control of the phase and frequency of phase locked loops, etc. Unlike previous methods, where switching is timed and controlled by monitoring the retrace voltage level, the system of the present invention monitors the change in direction of current in the retrace tuning capacitor. Monitoring the retrace capacitor current, provides an extremely accurate method for timing in horizontal deflection circuits. The apparatus of the present the invention comprises a small bead inductor placed in the current path of a horizontal retrace capacitor within the horizontal deflection circuit of the cathode ray tube device. Measuring the voltage across the bead inductor allows a very precise monitoring of the current through the retrace tuning capacitor.

Abstract: The present invention discloses a super resolution pan-sharpening technique that is used to increase the resolution of a multi-spectral signal using a panchromatic signal. Typically, multi-spectral signals, i.e., signals that contain a defined spectral band, have lower resolution than panchromatic signals since the multi-spectral signals normally contain fewer photons and require larger detectors for similar exposure periods. The technique of the present invention utilizes the panchromatic signal to increase the resolution of the multi-spectral signals to provide an increased resolution color output. The resolution of other spectral signals, such as infrared signals and UV signals, or any other desired signal, can also be increased in accordance with the techniques of the present invention.

Abstract: A semiconductor fuse and method for fabricating the same An insulating layer is provided and a trench formed therein. A fusible link is then formed across the insulating layer and trench and conformal therewith. The link has a break region of minimum thickness and width at an intersection of a sidewall and bottom surface of the trench.

Abstract: An apparatus for attenuating optical crosstalk induced components of a focus error signal in an optical disk drive of the type having a grooved optical disk with servo tracks and tracking and focus servo systems controlled by a digital signal processor. A calibration operation is performed whenever a new disk is inserted into the track. During the calibration operation, the disk is scanned about a tracking axis at a track crossing frequency greater than the focus servo system bandwidth. The focus error signals produced when the disk is scanned are filtered about a pass band including the track crossing frequency. Crosstalk values equal to values of the filtered focus error signals are determined as a function of corresponding values of the tracking error signals, and are stored in memory. A correction operation is performed while reading and writing data on the disk.

Abstract: A document to be scanned is corner referenced on a transparent platen, with the document's image facing down. The platen defines an X-Y coordinate system matrix. A moving line of light extends in the X direction and illuminates the document's image, line by line, as the line of light moves in the Y direction. The line of light that is thus reflected from the document is sensed by a linear CCD sensor array having a large number of individual sensor cells arranged in a line that effectively extends in the X direction. Each cell of the CCD array defines an individual pixel (PEL) within the line of light that is reflected from the document. A reflection target is located at a known position relative to the platen's referencing corner, to be scanned prior to scanning the document.

Abstract: In a computer system employing a common bus that is shared by an initiator and a plurality of targets, there is provided a method and apparatus that prevents data stored in a buffer, when one of the targets temporarily suspends a data transfer with the initiator, from being overwritten, while simultaneously minimizing the number of interrupts that must be employed to effect the data transfer. According to the disclosed invention, the initiator is interrupted by a second target only after the transfer of data from the initiator to a first target has been temporarily suspended, and only after the second target has reselected the bus. After the second target has reselected the bus, data read from the second target and transferred to the initiator is stored in a synchronous stack in the initiator to prevent any data remaining in the buffer from being overwritten.

Abstract: A system for integrating a composite dielectric layer in an integrated circuit to facilitate fabrication of a high density multi-level interconnect with external contacts. The composite dielectric layer comprises of a polymer layer which normally comprises a polyimide that is deposited using conventional spin-deposit techniques to form a planarized surface for deposition of an inorganic layer typically comprising silicon dioxide or silicon nitride. The inorganic layer is etched using standard photoresist techniques to form an inorganic mask for etching the polymer layer. A previously deposited inorganic layer functions as an etch stop to allow long over etches to achieve full external contacts which, in turn, allows high density interconnect systems on multiple levels.

Abstract: A sheet metal housing for an optical disk storage and handling apparatus which includes reference deformations provided in the sidewall panels of the sheet metal housing for locating mutually registerable components of the optical disk storage and handling system. A method of constructing such a sheet metal housing is also described.

Abstract: A method and system for forming tungsten structures in a semiconductor device which uses a chromium protective layer to protect underlying semiconductor layers during the etching process and a chromium mask layer so that tungsten structures can be formed with high aspect ratios using a reactive ion etching to etch the tungsten with a carbon tetrafluoride oxygen plasma in a reactive ion etcher. Long overetches can be achieved because of the high selectivity of chromium to the carbon tetrafluoride/oxygen plasma. The anisotropic nature of the reactive ion etcher prevents undercut during long overetches of the tungsten to further decrease losses in linewidth or increases in resistance as a result of overetching.

Abstract: A device and process for programmatically controlled in-circuit pin checks and gross functionality tests of digital to analog converters. The tests provide deterministic bit checks for higher order bits and non-deterministic or "delta" bit checks of low order bits independent of other circuitry on the printed circuit board of which the digital to analog converter is a component.

Abstract: A data compression system implementing expansion protection employs one or more pairs of FIFOs to compare the lengths of raw and processed versions of a block of received data. The shorter version is transmitted so that the data transmitted by the data compression system is at most negligibly expanded relative to the system input. A code is inserted in the output stream to indicate the beginning of the transmission of a raw data block so that a receiving or retrieving system can determine whether the data following needs to be decompressed or not. Further codes can be injected to indicate a switch from raw data to processed data in the output of the compression system.

Abstract: The trichromatic beamsplitter consists of composited dichroic beamsplitter plates that separate a projected image into its three color components with spatial as well as spectral precision. The three linear array photosensor comprises a monolithic sensor having three parallel photodiode arrays spaced precisely to accept the color component images of the trichromatic beamsplitter.The present invention also employs a spectral and spatial combiner that is capable of maintaining equal optical path lengths of each spectral beam so that a single combined beam can be produced and can be employed in a number of different applications such as a color camera device, a color recording device, a graphics presentation device, an electronic color filter device, a color projector device and a multi-channel optical communication device.

Abstract: An algebraic recursion process is defined to solve test conditions for sequential and combinatorial logic devices. The process is shown to be effective in identifying external pin faults, and is valid for in-circuit test conditions. Since only external pin faults are considered, there is no issue of the correspondence of Boolean products to the internal architecture of the device. Processes to identify the fault detection equation and initialization sequence are described and an effective minimization process presented. Functions simple enough to be implemented by logic networks fall within a range which is computationally tractable by the process of the invention.