Abstract: Switching power amplifier circuits for use in a frequency range from 0.5 MHz to 100 MHz are described. The power amplifier circuits have power field effect transistor (FET) devices as output components and the FET devices are driven by bipolar transistor devices without frequency limiting components. The power amplifier circuits can be coupled in parallel and the coupled amplifier circuits can be operated in a push-pull mode of operation for increased power. The systems using these amplifier devices can operate in a Class A, B, C, D, E, F and S modes. In particular, a Class D amplifier system is described that uses the switching power amplifier circuits in the extended frequency range.

Abstract: Apparatus and method are disclosed for determining the location of a network component coupled to a local area network segment. A remote segment monitor unit is coupled to either end of a cable segment of a local area network system. The remote segment monitor unit, for each transaction on the cable segment, determines a value related to the transaction signal strength and determines the identity of the network node from which the transaction originated. By providing a record of the transaction signal strength associated with each network node (component) in both remote segment monitors, the location of network nodes can be ascertained.

Abstract: Apparatus and method are disclosed for providing a calibrated measurement of signals applied to a local area network cable segment. A remote segment monitor unit has the signal sampling circuit coupled to a signal generating unit. The signal generating unit is controlled by a network system member (node) and applies a series of known signal levels to the signal sampling circuit of the remote segment monitor unit. The known signal levels from the signal generating unit and the signal levels measured by the remote segment monitor as a result of the known signal levels are compared and an appropriate scale factor entered in the processing circuit of the remote segment monitor. Using the calibrated remote segment monitor, the location of network nodes can be identified from the signal levels measured by the remote segment monitor.

Abstract: In floating point operations, it is necessary to align the fractions of the floating point operands before addition or subtraction operations can be executed. This fraction alignment is performed by a shifting operation, typically using dedicated apparatus such as a barrel shifter. While the dedicated apparatus provides high performance in the execution of the shifting operation, this performance is accomplished by reserving a portion of the substrate area for apparatus implementation. To avoid the use of dedicated apparatus, the shifting operation is performed in a multiplier unit, according to the present invention, by entering the number to be shifted in the multiplicand register of the multiplier unit while entering appropriate control signals in the multiplier register. In this manner, a shifting operation can be performed without dedicated apparatus and with minor impact on performance.

Abstract: In a data processing system network, apparatus and method are disclosed for coupling two local area networks by means of a wireless link. Typically, two local area network (LAN) systems are coupled by a bridge device, the bridge device receiving signal groups from each LAN system and selectively forwarding the signal groups to the target LAN system. In the presence of the overlapping (or simultaneous) transmission of signal groups applied to the target LAN system, these signal groups must be reapplied to the target LAN system until a non-overlapping transmission is obtained. In the present invention, when the LAN systems are coupled by a wireless (radiation) link, an interface unit is coupled between each wireless transmitter/detector unit and the associated LAN system. Each interface unit includes a bridge device that provides the system response to the overlapping signal groups.

Abstract: In order to insure the accuracy of information transmitted over a network, the initiation of the message must be unambiguously identified. In the present invention, the intermessage spacing consists of a series of identical logic signals that exceeds a minimum value distinguishing this interval from a message character. The message character has predefined length, with a start bit position logic signal and a stop bit position logic signal bounding the character that has the same number of predetermined logic signals for every message character. The character has at least one additional non-data bit position that has a first logic signal for the initial character of a message and the complementary logic signal for the remaining characters in the message.

Abstract: An environmental testing facility for verifying operational conditions of electronic components at predefined temperature extremes is described. A removable multistation holder is configured to have a plurality of components coupled thereto. The multistation holder is coupled to a controllable, rotatable shaft. A hood is placed over the holder, shaft and associated apparatus and placed in contact with a base plate, so that a vacuum can be established in the resulting chamber. A sensing device permits the positioning of the individual components with respect to an interface apparatus. When the component is correctly positioned with respect to the interface apparatus, the interface apparatus is moved to engage the terminals of the components. The electrical signals can be applied to and received from the component through the interface device. After a first temperature condition is established for the multistation holder and consequently for the components coupled thereto, all of the components are tested.

Abstract: In combination with a multiprocessing and multiprogramming computer system having a ring protection mechanism for protecting computer programs from unauthorized access, a new architecture for the execution of the call instruction, the return instruction, and the trap procedure is implemented partly in firmware and partly in hardware. The architecture includes a new stack mechanism for storing hardware managed control information in a control frame and software controlled data in a data frame.

Abstract: In a multiplier unit implemented with carry/save adder stages and executing a modified Booth algorithm, the signals, required to complete the 2's complement in order to perform a subtraction operation during the multiplication procedure using carry/save adder cells, are entered in the first carry/save stage in the appropriate carry/save cell positions. In this manner, one less signal is processed by the time-critical least significant cell associated with each carry/save adder stage, thereby reducing the overall time delay associated with the multiplier unit and accelerating the multiplication operation.

Abstract: In order to prevent `jabber`, the uncontrolled transmission of messages on a communication channel, an antijabber timing unit is frequently used to determine whether a message on the communication channel exceeds the maximum permitted length of time. The present invention provides testing apparatus to determine when the antijabber timing unit is functioning accurately. In addition, protection is provided so that the testing apparatus does not compromise the function of the antijabber timing unit during subsequent message transmission. The antijabber timing unit is also used as part of the enable function for the transmission of messages over a channel to prevent the failure of a single component from resulting in inadvertent transmission of information.

Abstract: In electronic devices, such as data processing systems that operate at high frequencies, the integrity of the interconnect or coupling apparatus transferring signals between component modules is critical to prevent compromise of information being transferred. However, the interconnect or coupling apparatus is subject to both long term and to short term impedance variations. Apparatus is disclosed for testing both the long term impedance changes and the rapid fluctuations that are not observable by current testing procedures. In addition, apparatus is disclosed for providing controllable rapid impedance changes to verify the operation of test apparatus, disclosed herein, for measuring the rapid impedance changes.

Abstract: The arithmetic operations performed for floating point format numbers involve procedures having a multiplicity of major steps. In the performance of the effective subtraction operation, the determination of absolute value of the difference between the operand exponent arguments must be obtained in order to determine the correct procedure. In the present invention, a difference between a subset of the operand exponent arguments is calculated and the result of this calculation is used to anticipate the correct procedure. By careful selection of the anticipated correct procedure, when the selection is erroneous, the correct result is immediately available. The availabilty of the correct result is achieved by selecting the subset of operand exponent arguments so that, in the event that the result is erroneous, the correct difference is such that the associated operand fraction (i.e., to be shifted by the amount of the difference) is shifted completely out of the operand fraction field (stored in a register).

Abstract: Apparatus and method are disclosed for providing a noninvasive testing of the status of the motor muscle response of an individual by testing specific voluntary and involuntary motor responses. The voluntary motor response is tested by having the individual under test enter a preselected code sequence (for example, in a keypad) and measuring the parameters associated with the sequence entry. The measured parameters are compared with baseline, non-impaired, parameters for that individual performing the same activity. The involuntary motor response is measured by introducing a transient light stimulus to the pupil of the eye and measuring the response and recovery parameters of the pupil to the light stimulus. The measured involuntary response parameters to the light stimulus is also compared to baseline, non-impaired parameters for the individual responding to the same situation.

Abstract: The arithmetic operations performed for floating point format numbers involve procedures having a multiplicity of major steps. The effective subtraction operation can be accelerated by using two methods of execution depending on whether the absolute value of the difference between the arguments of the exponents, ABS{DELTA(E)} is .ltoreq.1 or >1. The procedure for ABS{DELTA(E)}.ltoreq.1 requires more major process steps than the situation where ABS{DELTA(E)}.ltoreq.1. To accelerate only the procedure having more major process steps, the two least significant bits of both exponent arguments are examined and based on the examination, the lengthier procedure can be initiated in parallel with the process step determining the value of ABS{DELTA(E)}. When the lengthier procedure is determined to be inappropriate based on the determined value, the results of the lengthier process can be discarded. Otherwise, the lengthier process, already in progress, is continued.

Abstract: In a floating point arithmetic execution unit, an additional adder unit and a selection network are added to the apparatus typically performing the arithmetic floating point function. The additional apparatus permits certain processes forming part of arithmetic operations to be executed in parallel. For selected arithmetic operations, the final result can be one of two values typically related by an intermediate shifting operation. By performing the processes in parallel and selecting the appropriate result, the execution time can be reduced when compared to the execution of the process in a serial implementation. The fundamental arithmetic operations of addition, subtraction, multiplication and division can each have the execution time decreased using the disclosed additional apparatus.

Abstract: In a multi-processor unit data processing system, apparatus and method are described for providing that only the most recent version of any data signal group will be available for manipulation by a requesting data processing unit. A "multiple" state for a data signal group is defined by the presence of a particular data signal group stored in the cache memory units of a plurality of data processing units. The "multiple" state is associated with each copy of a data signal group by control signals. When a data signal group is changed by the local data processing unit, an "altered" state is associated with the new data signal group. The simultaneous presence of an "altered" state and "multiple" state is forbidden and requires immediate response by the data processing system to insure consistency among the data signal groups. In addition to apparatus for identifying and storing the state of the data signal groups, apparatus must be provided for communication of the selected states to the data processing units.

Abstract: A liquid crystal display is described that includes gray scale capability. Each pixel of the display is subdivided into a plurality of subpixels. Each subpixel includes an effective capacitor, with the liquid crystal material contained between the effective capacitor plates, and includes a control capacitor coupled in series with the effective capacitor. By controlling the capacitance of the control capacitors of the subpixels, selected subpixels can be activated as a function of the voltage applied across the series capacitors. By controlling the number of subpixels that are activated by the applied voltage, a gray scale capability can be provided for a liquid crystal display.

Abstract: In a process control network, apparatus and method for periodic testing of a thermocouple element includes a switching mechanism that inserts a circuit with known parameters in series with the thermocouple. Voltages levels with and without the inserted circuit are compared and used to identify a failed or failing thermocouple.

Abstract: In a data processing system, the packages containing the electronic components are cooled by directing the cooling material through an array of nozzles toward the packages and components. The nozzles are fabricated in the circuit board, the flow of the coolant being the result of a difference in pressure of the coolant between the two sides of the circuit board. In the preferred embodiment, the nozzles are positioned directly below the component package. The component packages are removed from the surface of the circuit board, to which the component package is attached, to permit relatively uninhibited flow by the coolant past the component package. The nozzle arrays can be implemented to compensate for a non-uniform distribution of heat sources within a component package to provide a generally uniform temperature for the package or component.