Patents Represented by Attorney, Agent or Law Firm William W. Kidd
  • Patent number: 6594284
    Abstract: A network arrangement uses a poll select control protocol and a loop back arrangement at each node for equalizing transmission delay from each node to a central station. Delays at each node can be adjusted to start timing in response to a broadcast signal indicating an amount of delay to be applied from the start of a synchronization interval to the beginning of transmission of data collected at the nodes. The arrangement is particularly useful in the field of data acquisition and particularly in the area of seismic sensing.
    Type: Grant
    Filed: September 16, 1998
    Date of Patent: July 15, 2003
    Assignee: Cirrus Logic, Inc.
    Inventors: Joel Page, Edwin De Angel, Wai Laing Lee, Lei Wang, Hong Helena Zheng, Chung-Kai Chow
  • Patent number: 6292911
    Abstract: A technique for detecting error when transferring data on a data channel between components disposed on the data channel. A test pattern is generated by a controller on the data channel and sent to a data storage component on the channel. The data storage component tests the received test pattern to determine if the pattern has been corrupted.
    Type: Grant
    Filed: December 17, 1998
    Date of Patent: September 18, 2001
    Assignee: Cirrus Logic, Inc.
    Inventor: Eric J. Swanson
  • Patent number: 6157205
    Abstract: A technique for reducing jitter on a data channel utilized for transfer of data between components disposed on the channel. Instead of coupling a ground of the channel directly to a ground network of a chip containing the data transferring device, an impedance between the channel ground and a substrate is utilized to minimize the jitter.
    Type: Grant
    Filed: November 23, 1998
    Date of Patent: December 5, 2000
    Assignee: Cirrus Logic, Inc.
    Inventor: Eric J. Swanson
  • Patent number: 6133719
    Abstract: A technique for providing a start-up circuit for a bandgap reference. An amplifier configured in a differential arrangement as the bandgap reference. A start-up circuitry ensures that a second input node is maintained at a lower voltage than a first input node of the amplifier at start-up, when the output node corresponding to the second input side of the amplifier is also pulled low.
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: October 17, 2000
    Assignee: Cirrus Logic, Inc.
    Inventor: Prabir C. Maulik
  • Patent number: 6111529
    Abstract: A technique for performing gain calibration on an analog-to-digital converter (ADC) in which offset errors are canceled during gain calibration. In an ADC having a differential integrator at the input of a modulator, two calibration measurements are obtained at the output, one based on a calibration input and the second based on the reversal of the input polarity. The two measured outputs are subtracted from each other so that offset errors introduced by the converter during gain calibration are cancelled.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: August 29, 2000
    Assignee: Cirrus Logic, Inc.
    Inventors: Prabir C. Maulik, Mandeep Singh Chadha
  • Patent number: 6091349
    Abstract: A technique for separating an operation of a digital stage into separate noise generation periods in order to time the generation of noise from the digital stage. The invention is utilized in a mixed-signal integrated circuit having analog and digital signals in which the timing of the noise generation ensures that noise is abated during an analog sampling event.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: July 18, 2000
    Assignee: Cirrus Logic, Inc.
    Inventors: Mandeep Singh Chadha, Prabir C. Maulik
  • Patent number: 5783497
    Abstract: A forced-flow polishing technique forcibly flows slurry across the surface of a wafer. The slurry and the wafer are contained in a confined space so that the slurry flow is between a fixed upper and lower boundaries. The slurry flow places selective stress on wafer features such that taller surfaces are eroded at a faster rate. The constant flow allows for uniformity in achieving the selective erosion across the wafer surface.
    Type: Grant
    Filed: August 2, 1994
    Date of Patent: July 21, 1998
    Assignee: Sematech, Inc.
    Inventors: Scott Runnels, Anthony J. Toprac
  • Patent number: 5695810
    Abstract: A technique for electrolessly depositing a CoWP barrier material on to copper and electrolessly depositing copper onto a CoWP barrier material to prevent copper diffusion when forming layers and/or structures on a semiconductor wafer.
    Type: Grant
    Filed: November 20, 1996
    Date of Patent: December 9, 1997
    Assignees: Cornell Research Foundation, Inc., Sematech, Inc., Intel Corporation
    Inventors: Valery M. Dubin, Yosi Schacham-Diamand, Bin Zhao, Prahalad K. Vasudev, Chiu H. Ting
  • Patent number: 5572398
    Abstract: A tri-polar electrostatic chuck has both positive and negative electrodes housed on a non-polarized base housing. A non-polarized guard ring surrounds the outer periphery of the chuck and enclosing the electrodes. A wafer is placed atop the chuck with its back-side cooled by a cooling gas that is piped up through the chuck. The edge of the wafer is made to reside over the guard ring, instead of over one of the polarized electrodes. The proximity of the non-polarized guard ring to the wafer edge helps to reduce the amount of plasma leakage around the edge of the wafer, resulting in less breakdown of the dielectric coating of the chuck. The positioning of the electrodes also provides for a uniform impedance across the processing surface of the wafer.
    Type: Grant
    Filed: November 14, 1994
    Date of Patent: November 5, 1996
    Assignees: Hewlett-Packard Co., International Business Machines, Corp., Sematech, Inc.
    Inventors: Peter Federlin, Lee Chen, D. Rex Wright
  • Patent number: 5562530
    Abstract: A pulsed-force CMP scheme allows for the down force holding a wafer onto a pad to cycle periodically between minimum and maximum values. When the force is near its minimum value, slurry flows into the space between the wafer and the pad. When the force is near its maximum value, slurry is squeezed out allowing for the abrasive action of the pad surface to erode wafer surface features.
    Type: Grant
    Filed: August 2, 1994
    Date of Patent: October 8, 1996
    Assignee: Sematech, Inc.
    Inventors: Scott Runnels, L. Michael Eyman
  • Patent number: 5555902
    Abstract: Liquid nitrogen is introduced onto a surface of a semiconductor wafer to remove submicron particles from its surface. LN.sub.2 flows across the wafer surface wherein the surface tension of the liquid collects contaminant particles and removes them off the edge of the wafer.
    Type: Grant
    Filed: May 10, 1995
    Date of Patent: September 17, 1996
    Assignee: Sematech, Inc.
    Inventor: Venugopal B. Menon
  • Patent number: 5480747
    Abstract: An attenuated phase shifting mask has absorbers embedded (buried) in the mask substrate, instead of on the surface of the substrate. The buried absorbers allow for controlling attenuation and phase shifting parameters. The material composition and the thickness of the absorber regions determine the amount of attenuation that is to be achieved, as well as phase shifting in some instances. In other instances, offset distances of the absorbers from the surface of the mask control the phase shift. Light scattering and diffraction is reduced or eliminated by having the absorbers below the surface of the mask. By reducing light scattering and distortion, the mask of the present invention allows for PSM lithography techniques to be extended to ranges of shorter wavelength.
    Type: Grant
    Filed: November 21, 1994
    Date of Patent: January 2, 1996
    Assignee: Sematech, Inc.
    Inventor: Prahalad K. Vasudev
  • Patent number: 5479340
    Abstract: Hotelling's T.sup.2 statistical analysis and control is used to provide multivariate analysis of components of an RF spectra for real time, in-situ control of an ongoing semiconductor process. An algorithm calculates the T.sup.2 value which is then used to generate a feedback signal, if the T.sup.2 value is out of range, to indicate an out-of-tolerance condition.
    Type: Grant
    Filed: September 20, 1993
    Date of Patent: December 26, 1995
    Assignees: Sematech, Inc., Intel Corporation
    Inventors: Edward P. Fox, Chandru Kappuswamy
  • Patent number: 5478435
    Abstract: A point of use slurry dispensing system with controls for dilution, temperature and oxidizer/etchant/additive infusion. A slurry in unmixed form and a diluting agent are independently pumped to a pad on a CMP tool. Liquid heaters are used to heat the slurry and the diluting agent to a desirable temperature. The actual mixing occurs at the point of use on the pad or in a dispensing line just prior to the point of use. In some instances a third independent distribution line is used to dispense an oxidizer, etchant and/or chemical additive at or near the point of use.
    Type: Grant
    Filed: December 16, 1994
    Date of Patent: December 26, 1995
    Assignees: National Semiconductor Corp., Sematech Inc., AT&T GIS
    Inventors: James J. Murphy, Janos Farkas, Lucia C. Markert, Rahul Jairath
  • Patent number: 5474865
    Abstract: A globally planarized binary optical mask has absorbers embedded (buried) in the mask substrate, instead of on the surface of the mask. Light scattering at rough vertical edges of absorbers of prior art masks are reduced or eliminated. Also, due to the buried nature of the absorbers, a triple singularity point encountered in prior art masks at the interface of three environments of quartz, absorber and air, no longer exists. The buried absorbers have an offset distance from the surface of the substrate so that with a minimum effective offset distance, defects and contaminants at the surface of the mask are no longer in the image plane, wherein alleviating a need for a pellicle to protect the mask surface. By reducing light scattering and distortion, the mask of the present invention allows for conventional optical lithography to be extended to ranges of shorter wavelength.
    Type: Grant
    Filed: November 21, 1994
    Date of Patent: December 12, 1995
    Assignee: Sematech, Inc.
    Inventor: Prahalad K. Vasudev
  • Patent number: 5472561
    Abstract: A RF sensor for monitoring voltage, current and phase angle of a RF signal being coupled to a plasma reactor. Outputs from the sensor are used to calculate various properties of the plasma. These values are then utilized to characterize the process and/or used to provide feedback for in-situ control of an ongoing plasma process.
    Type: Grant
    Filed: March 27, 1995
    Date of Patent: December 5, 1995
    Assignee: Sematech, Inc.
    Inventors: Norman Williams, James Spain
  • Patent number: 5472811
    Abstract: A multi-layer PSM structure with multi-layer optical coating disposed between a quartz substrate and a surrounding medium, which typically is air. The multi-layer coating is comprised of a high index of refraction material overlying the quartz and a lower index of refraction material overlying the first. The multi-layer coating essentially functions as an anti-reflective coating to reduce scattering and reflection at the interface boundaries.
    Type: Grant
    Filed: April 29, 1994
    Date of Patent: December 5, 1995
    Assignees: Sematech, Inc., Motorola Inc.
    Inventors: Prahalad K. Vasudev, Kah K. Low
  • Patent number: 5467013
    Abstract: A RF sensor for monitoring voltage, current and phase angle of a RF signal being coupled to a plasma reactor. Outputs from the sensor are used to calculate various properties of the plasma. These values are then utilized to characterize the process and/or used to provide feedback for in-situ control of an ongoing plasma process.
    Type: Grant
    Filed: December 7, 1993
    Date of Patent: November 14, 1995
    Assignee: Sematech, Inc.
    Inventors: Norman Williams, James Spain
  • Patent number: 5466991
    Abstract: The present invention describes a technique to control the radial profile of microwave power in an ECR plasma discharge. In order to provide for a uniform plasma density to a specimen, uniform energy absorption by the plasma is desired. By controlling the radial profile of the microwave power transmitted through the microwave window of a reactor, the profile of the transmitted energy to the plasma can be controlled in order to have uniform energy absorption by the plasma. An advantage of controlling the profile using the window transmission characteristics is that variations to the radial profile of microwave power can be made without changing the microwave coupler or reactor design.
    Type: Grant
    Filed: November 15, 1994
    Date of Patent: November 14, 1995
    Assignee: Sematech, Inc.
    Inventor: Lee A. Berry
  • Patent number: 5456758
    Abstract: Liquid nitrogen is introduced onto a surface of a semiconductor wafer to remove submicron particles from its surface. LN.sub.2 flows across the wafer surface wherein the surface tension of the liquid collects contaminant particles and removes them off the edge of the wafer.
    Type: Grant
    Filed: April 26, 1993
    Date of Patent: October 10, 1995
    Assignee: Sematech, Inc.
    Inventor: Venugopal B. Menon