Abstract: A method and apparatus for calibrating failures in semiconductor memory devices due to contact mask misalignment includes: providing a plurality of semiconductor memory devices on a die; providing a contact mask with a plurality of known offsets; creating a plurality of contacts on the die using the contact mask; determining which devices on the die fail; and creating a pass/fail map for the devices. The pass/fail map can be used to determine the range of allowed misalignment and the amount of misalignment, providing a better understanding of how contact mask misalignment affects the yield and reliability of the memory devices. The pass/fail map may also be used for comparison with a pass/fail map created after the arrays have been subjected to a known stress.

Abstract: A method for cutting single-wall carbon nanotubes involves partially fluorinating single-wall carbon nanotubes and pyrolyzing the partially fluorinated nanotubes in an inert atmosphere or vacuum up to about 1000° C. The nanotubes are optionally purified before cutting. The partial fluorination involves fluorinating the nanotubes to a carbon-fluorine stoichiometry of CFx, where x is up to about 0.3. The invention also relates to the derivatization of fluorinated and cut single-wall carbon nanotubes. The single-wall carbon nanotubes can be cut to any length depending on the fluorination and pyrolysis conditions. Short nanotubes are useful in various applications, such as field emitters for flat panel displays and as “seeds” for further nanotube growth.

Abstract: A method and processor for selecting instructions in a prefetch buffer in the event of a miss in an instruction cache with a zero cycle penalty. A first, second and third hash may be performed on an address retrieved from a program counter. The first hashed address may be used to index into the instruction cache. The second hashed address may be used to index into the prefetch buffer. If the value stored in the indexed entry in an effective address array of the instruction cache does not equal the value of the third hash of the address (an instruction cache miss), then the instructions in the indexed entry in the prefetch buffer are selected. In this manner, instructions may be selected in the prefetch buffer in the event of a miss in the instruction cache with a zero cycle penalty.

Abstract: A method for providing machine generated sweepstakes entries is disclosed for a distributed parallel processing system. The distributed processing system identifies and utilizes capabilities of distributed devices connected together through a wide variety of communication systems and networks and utilizes those capabilities to organize, manage and distribute project workloads to the distributed devices.

Abstract: A constant ON-time controller for a buck converter utilizes dual symmetrical ramps. The ramps may be generated artificially or by sensing the voltage across a sense resistor in the output. The ramp may also be generated by sensing the voltage across the “ON” resistance of the low side FET in the switching regulator. A modified output voltage has one of the ramps superimposed and a modified reference voltage has the other ramps superimposed. The modified output voltage and the modified reference voltage are compared to determine when to start the ON-time of the buck converter. The dual ramps reduce, noise susceptibility. The ON-time is stopped in response to charging a capacitor with the regulator input voltage. An offset may also be generated representing the difference between the average output voltage and the reference voltage. The offset is used to generate a modified reference to compensate for the offset.

Abstract: A method, system and computer program product for generating an alternative form of transmitted environmental data, e.g., scent information, air temperature settings, air humidity settings, triggering of infrared devices such as to create tactile warmth. Upon identifying one or more environmental data files in a received file, e.g., HTML file, environmental data associated with the data files may be read and interpreted. If there are no environmental devices, e.g., smell-generating device, configured to emit a response to the environmental data or if the environmental devices are disabled from emitting a response to the environmental data, then the environmental data may be translated into a form a computer may be capable of reproducing. The translated form may then be outputted in a variety of forms such as: pictorial data (e.g., picture of a pine tree substituting a pine smell), graphical effects (e.g., screen-flashing effect may substitute a strobe-light trigger).

Abstract: A system and method for reducing timing uncertainties in a serial data signal A system may comprise a transmitter configured to transmit serial data to a receiver through a transmission medium, e.g., wireless, wired. The receiver may comprise an oscillator configured to generate multiple phases of a clock. The receiver may further comprise a retiming mechanism configured to reduce the timing uncertainties of the serial data received by the receiver by selecting a particular phase of the clock to be asserted to sample the serial data signal. The particular phase may be selected by selecting the appropriate synchronization state/retiming state. A retiming state indicates which particular phase of the clock should be asserted to sample the serial data signal. A synchronization state indicates which particular phase of the clock is the appropriate one to assert at a given transition of the serial data signal.

Abstract: A method and system for providing a semiconductor device. The semiconductor device includes a first layer to be etched. The method and system include depositing an anti-reflective coating. At least a portion of the anti-reflective coating layer is on the first layer. The method and system also include patterning a resist layer. The resist layer includes a pattern having a plurality of apertures therein. The resist layer is for etching the first layer. A first portion of the first layer and a second portion of the anti-reflective coating layer are exposed by the pattern. The method and system also include etching the first portion of the first layer and the second portion of the anti-reflective coating layer and removing the resist layer utilizing a plasma etch. The anti-reflective coating layer is resistant to the plasma etch.

Abstract: A method and system for providing at least one contact in a semiconductor device. The semiconductor device includes a substrate, an etch stop layer, an interlayer dielectric on the etch stop layer, an anti-reflective coating layer on the interlayer dielectric, and at least one feature below the etch stop layer. A resist mask having an aperture and residing on the anti-reflective coating layer is provided. The aperture is above an exposed portion of the anti-reflective coating layer. The method and system include etching the exposed anti-reflective coating layer and the underlying interlayer dielectric without etching through the etch stop layer, thereby providing a portion of at least one contact hole. The method and system also include removing the resist mask in situ, removing a portion of the etch stop layer exposed in the portion of the contact hole, and filling the contact hole with a conductive material.

Abstract: A system for minimizing the length of the longest diagonal interconnection. A multiple chip module may comprise a first chip connected to a second chip located diagonally to the first chip. The first and second chip are interconnected by one or more interconnections commonly referred to as diagonal interconnections. Since the one or more diagonal interconnections between the first chip and the second chip are interconnected between a set of pins on each chip that form a triangular pattern, the longest diagonal interconnection is substantially the same length as the length of the longest orthogonal interconnection. Furthermore, since the one or more diagonal interconnections between the first chip and the second chip are interconnected between a set of pins on each chip that form a triangular pattern, the longest diagonal interconnection is substantially the same length as the length of the second longest diagonal interconnection.

Abstract: A register in the control unit of the CPU that is used to keep track of the address of the current or next instruction is called a program counter. In an SMT system having two threads, the CPU has program counters for both threads and means for alternately selecting between program counters to determine which thread supplies an instruction to the instruction fetch unit (IFU). The software for the SMT assigns a priority to threads entering the code stream. Instructions from the threads are read from the instruction queues pseudo-randomly and proportional to their execution priorities in the normal power mode. If both threads have a lowest priority, a low power mode is set generating a gated select time every N clock cycles of a clock when valid instructions are loaded. N may be adjusted to vary the amount of power savings and the gated select time.

Abstract: Delay circuits have programmable delay elements to delay data signals so a clock samples the data signals in the middle of the eye window pattern. The clock is frequency divided by two, generating a divided clock coupled to a clock delay circuit and a data delay circuit generating a toggle clock and a delayed toggle clock that are sampled with the clock signal. A state machine varies the number N of delay elements selected in the data delay circuit until successive samples of the toggle clock and the delay toggle clock have opposite logic stages. The resulting number N is the number of delay elements required to generate a delay equal to one period of the clock. The delay of each delay element is adjusted using adjustment control signals until an N is generated that is within a predetermined range. The adjustment control signals are distributed to the data delay circuits.

Abstract: Nanopowder synthesis systems in which a pulsed magnetic field is applied to electrodes of precursor material, in close proximity to an electrical discharge arc that is formed between the electrodes, to attain increased yields of nanopowder. A magnet insert of a coating precursor material is used to coat the nanopowder and thereby reduce nanoparticle agglomeration.

Abstract: An electron beam duplication lithography apparatus and method for focusing electrons emitted from a mask plate as a result of an application of an electric field between a mask plate and a duplication plate. Irradiation of electrons from the mask plate is assisted through an electric field lens or magnetic field lens, or a combination thereof from an electron field emission material formed into a pattern on a flat surface of a substrate. The result is that a congruent or similar pattern is lithographed by electron beam exposure onto an electron beam resist film from a field emission film having the congruent or similar pattern to be created.

Abstract: A computing device incorporates a user sensor to signal when a user is moving or within a specified proximity of the computing device. If the user is not present, the computing device will go into a low-power mode. A real-time clock is programmed to interrupt at user indicted event times and dates. If a queued event occurs, the computing device samples the user sensor and begins notification procedures if the user is present. If a queued event time occurs while the user is not present, then the computing device enters or stays in the low-power mode. If the user sensor indicates that the user is present, the computing device notifies the user of the pending event and any missed events. The computing device may require a user code before normal operation is activated following a transition to an indication that the user is present.

Abstract: This invention relates generally to cutting single-wall carbon nanotubes (SWNT). In one embodiment, the present invention provides for preparation of homogeneous populations of short carbon nanotube molecules by cutting and annealing (reclosing) the nanotube pieces followed by fractionation. The cutting and annealing processes may be carried out on a purified nanotube bucky paper, on felts prior to purification of nanotubes or on any material that contains single-wall nanotubes. In one embodiment, oxidative etching with concentrated nitric acid is employed to cut SWNTs into shorter lengths. The annealed nanotubes may be disbursed in an aqueous detergent solution or an organic solvent for the fractionation. Closed tubes can also be derivatized to facilitate fractionation, for example, by adding solubilizing moieties to the end caps.

Abstract: A system and method for preventing at least in part a server overload. A server may send a request to one or more routers located on the server side of a network system to block, i.e., filter, packets of data that may exceed the capacity of the server to service. The one or more routers located on the server side may block, i.e., filter, those packets of data as well as propagate the request to block those packets of data to one or more neighboring routers which may be located on the client side of the network system. The one or more neighboring routers may then block those packets of data that may exceed the capacity of the server to service and/or propagate the request to block those packets of data to their one or more neighboring routers.

Abstract: A method and system for improving the performance of a cache. The cache may include a tag entry that identifies the previously requested address by the processor whose data was not located in the cache. If the processor requests that address a second time, then there is a significant probability that the address will be accessed again. When the processor requests the address identified by the tag entry a second time, the cache is updated by inserting the data located at that address and evicting the data located in the least recently used entry. In this manner, data will not be evicted from the cache unless there is a significant probability that the data placed in the cache will likely be accessed again. Hence, data may not be evicted in the cache by the processor and replaced with data that will not be reused, such as in an interrupt routine.

Abstract: The present invention relates to new compositions of matter and articles of manufacture comprising SWNTs as nanometer scale conducting rods dispersed in an electrically-insulating matrix. These compositions of matter have novel and useful electrical, mechanical, and chemical properties including applications in antennas, electromagnetic and electro-optic devices, and high-toughness materials. Other compositions of matter and articles of manufacture are disclosed, including polymer-coated and polymer wrapped single-wall nanotubes (SWNTs), small ropes of polymer-coated and polymer-wrapped SWNTs and materials comprising same. This composition provides one embodiment of the SWNT conducting-rod composite mentioned above, and also enables creation of high-concentration suspensions of SWNTs and compatibilization of SWNTs with polymeric matrices in composite materials.

Abstract: A method and system for drillstem testing multiple zones in a well with a single testing trip into the well. A multiple zone tester is landed in the lower completion to form separate controllable flow paths from each of the zones. The multiple zone testing system facilitates testing each zone singularly and performing commingled tests without pulling out of the well.