Abstract: In accordance with the invention, an improved image sensor comprises an array of germanium photosensitive elements integrated with a silicon substrate and integrated with silicon readout circuits. The silicon transistors are formed first on a silicon substrate, using well known silicon wafer fabrication techniques. The germanium elements are subsequently formed overlying the silicon by epitaxial growth. The germanium elements are advantageously grown within surface openings of a dielectric cladding. Wafer fabrication techniques are applied to the elements to form isolated germanium photodiodes. Since temperatures needed for germanium processing are lower than those for silicon processing, the formation of the germanium devices need not affect the previously formed silicon devices. Insulating and metallic layers are then deposited and patterned to interconnect the silicon devices and to connect the germanium devices to the silicon circuits.

Abstract: A method for growing a single-crystal region of a III-V compound on a surface corresponding to a crystallographic plane of a single-crystal silicon substrate, including the steps of growing by epitaxy on the substrate a single-crystal germanium layer; etching in a portion of the thickness of the germanium layer an opening, the bottom of which corresponds to a single surface inclined with respect to the cristallographic plane or to several surfaces inclined with respect to the cristallographic plane; and growing the single-crystal III-V compound on the bottom of the opening.

Abstract: A focal plane array sensor includes optics located along an optical path, for transmitting radiation. A focal plane array and integrated circuit, located along the optical path for receiving the transmitted radiation, responsively produces image signals from the transmitted radiation. The integrated circuit includes apparatus for converting the image signals into digital image data at digital image data outputs.

Abstract: A method and device for maintaining junction isolation between a second region that is normally clamped at a reference potential, contained within a first region of an opposite type of conductivity whose potential is subject to large inertial swings. The junction is ensured even when the potential of the first region moves toward and beyond the reference potential to which the second region is clamped, by connecting the second region to the reference potential by a switch, and causing the switch to open which places the second region in a floating state, leaving it free to track the potential excursion of the first region. The switch is closed after the potential of the first region has returned to a normal value. A comparator senses a shift of the potential of the second region from the reference potential to which it is clamped. The shift is dynamically induced by the capacitive coupling of the two regions, and triggers off the clamping switch.

Abstract: A security technique for use in an intelligent network. The security technique provides a method for authorizing access by a process located in an invocation node to an object, or a network resource, located in an execution node. The method includes the steps of granting permission to the invocation node to access the object by transmitting a capability and a signature from the execution node to the invocation node. The capability includes a unique indentifier of the object and access rights to the object. The signature is formed at the execution node by encryption of the capability with an encryption key that is unique to the invocation node and is stored only in the execution node. A request for access to the object is transmitted with the capability and the signature from the invocation node to the execution node. At the execution node, the request is authenticated by encryption of the capability with the encryption key that is associated with the invocation node to form a test signature.