Abstract: An electronic device is provided for connecting to an external device. The electronic device includes a main body, a connector at a proximal end of the main body, a bottom case coupled to the main body at a distal end, and a top case slidably located opposite to the bottom case. The electronic device further includes a first cantilever locking arm and a second cantilever retaining arm on at least one side of the main body. The top case is slid towards the bottom case to expose the connector and the top case is slid towards the connector to cover the connector. The first cantilever locking arm includes an open locking mechanism and a close locking mechanism for maintaining the top case in an open state and a closed state respectively. The second cantilever retaining arm retains the top case on the main body.

Abstract: A high intensity discharge (HID) driver for a HID lamp which can be used as a HID ballast is provided. The HID driver at least includes an input processor connected to an input power for suppressing a transient and in in-rush current of the input power, a main driver connected to the input processor and a HID lamp for driving and amplifying the input power; and a protection circuit connected to the main driver and the HID lamp for controlling a timing of starting after a failure condition. Moreover, the HID driver can further includes a timing circuit connected to the main driver for controlling a timing, and a starting circuit connected to the timing circuit and the HID lamp for starting the HID lamp. The HID driver can be applied to a high pressure sodium (HPS) lamp or a halide lamp (HML).

Abstract: A method is provided for cleaning a dual damascene structure. A first metal layer, a cap layer, and a dielectric layer are formed on a substrate in sequence. Then a dual damascene opening is formed in the dielectric layer and the cap layer exposing the first metal layer. Next, a post-etching cleaning step is carried out to clean the dual damascene opening using a fluorine-based solvent. Then, an argon gas plasma is sputtered to clean the dual damascene opening before a second metal layer fills in the dual damascene opening.

Abstract: A double-bit non-volatile memory cell structure and a method of programming the memory cell. The memory cell includes a pair of stacked gates above a substrate, a doped region in the substrate between the stacked gate pair and a source/drain region in the substrate on each side of the stacked gate pair. The source/drain regions and the doped region are doped identically. To write data into the memory cell, the channel underneath both stacked gates is opened simultaneously. Data is written into the desired floating gate by controlling current flow direction. To read data from a first floating gate of the memory cell, a read bias voltage is applied to the first control gate above the first floating gate. In the meantime, a transfer voltage is applied to the second control gate. The presence or the absence of a conductive channel between the source/drain regions indicates whether data has been written into the first floating gate or not.

Abstract: An optical proximity correction method. Assist features, such as scattering bars, are added to a main pattern to be transferred. Calculations are performed on the entire two-dimensional original pattern using model-based optical proximity correction. A series of features are added according to the specific reference indexes of the coordinate system. The original pattern is altered to form a corrected pattern. The process of calculation and correction, however, does not include the scattering bars.

Abstract: A floating body ESD protection circuit positioned between and coupled to an I/O pad and an internal circuit. A p-type depletion mode transistor is used to control the body of an n-type enhancement mode transistor. When the p-type depletion mode transistor is triggered, the body of n-type enhancement mode transistor remains grounded. If the p-type depletion mode transistor has not been triggered, the body remains in a floating state, lowering the range of the snapback voltage. As a consequence the ESD protection circuit is able to function more rapidly. Similarly, an n-type depletion mode transistor is used to control the body of a p-type enhancement mode transistor. When the n-type depletion mode transistor is triggered, the body remains coupled to a high voltage. If the n-type depletion mode transistor has not been triggered, the body is in a floating state. Thus, the range of the snapback voltage can be lowered, enabling the ESD protection circuit to function more rapidly.