Patents Represented by Attorney Your Intellectual Property Matters, LLC
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Patent number: 8285503Abstract: The described apparatus and methods use Time Domain Reflectometry (TDR) to determine the absolute volumetric moisture content of various media. The effects of dispersion caused by conductive and dielectric properties of the medium on the waveform are extrapolated by detecting the bulk propagation time and the slope of the distorted transition of the characteristic reflected waveform. Fast transitions are injected by a differential step function generator into a two-conductor waveguide, which is immersed in soil or other medium of interest. Unlike previous single-ended TDR systems, a differential digitizer senses the probes. Timing control between the two digitizers is critical. Use of an integrated fully differential system eliminates the need for a coaxial cable and an associated balancing transformer, or balun. This enables a two-conductor probe that is more easily inserted into soil, rather than requiring three conductors.Type: GrantFiled: November 28, 2011Date of Patent: October 9, 2012Assignee: Technical Development Consultants, Inc.Inventor: Scott K. Anderson
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Patent number: 8148759Abstract: Memory cells are constructed from double-gated four terminal transistors having independent gate control. DRAM cells using one transistor to implement a Ferroelectric FeRAM are described. Top gates provide conventional access while independent bottom gates provide control to optimize memory retention for given speed and power parameters as well as to accommodate hardening against radiation. In a single transistor cell without a capacitor, use of the bottom gate allows packing to a density approaching 2 F2. Using a ferroelectric material as the gate insulator produces a single-transistor FeRAM cell that overcomes the industry-wide Write Disturb problem. The memory cells are compatible with SOI logic circuitry for use as embedded RAM in SOC applications.Type: GrantFiled: February 28, 2011Date of Patent: April 3, 2012Assignee: American Semiconductor, Inc.Inventors: Dale G. Wilson, Douglas R. Hackler, Sr.
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Patent number: 8089108Abstract: Memory cells are constructed from double-gated four terminal transistors having independent gate control. DRAM cells may use one, two or three transistors. Single transistor cells are constructed either with or without a bit storage capacitor, and both NAND- and NOR-type Non-Volatile NVRAM cells, as well as Ferroelectric FeRAM cells, are described. For all cells, top gates provide conventional access while independent bottom gates provide control to optimize memory retention for given speed and power parameters as well as to accommodate hardening against radiation. In a single transistor cell without a capacitor, use of the bottom gate allows packing to a density approaching 2 F2. The memory cells are compatible with SOI logic circuitry for use as embedded RAM in SOC applications.Type: GrantFiled: February 28, 2011Date of Patent: January 3, 2012Assignee: American Semiconductor, Inc.Inventors: Dale G. Wilson, Douglas R. Hackler, Sr.
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Patent number: 8072006Abstract: A high quality imager is constructed using a silicon-on-insulator (SOI) process with sensors fabricated in the SOI substrate and isolated by the buried oxide (BOX) from associated readout circuitry in the SOI layer. Handle windows are opened in the SOI device layer for fabrication of the sensors in the handle layer substrate and then closed prior to processing in the device layer. By keeping the buried oxide layer intact, the described technique allows for independent processing of sensors and readout circuitry so that each is optimized with regard to thermal and dopant properties without concern for degradation of the other. The process is compatible with the fabrication of readout circuitry using transistors having independent double-gates, which offer simultaneous advantages in scalability, low power and low noise. Photodiode sensors are shown with allowance for many other types of sensors. The process easily accommodates hardening against radiation.Type: GrantFiled: December 21, 2005Date of Patent: December 6, 2011Assignee: American Semiconductor, Inc.Inventors: Douglas R. Hackler, Sr., Richard A. Hayhurst, Stephen A. Parke
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Patent number: 8056677Abstract: This lift system serves as a powered ladder having a small footprint. The system is divided into two subchasses with a mast fixedly attached to a first subchassis for support of a liftable platform which may carry a human operator. Maneuverability is accomplished by a virtual articulating joint between the two subchasses. The joint comprises hydraulic cylinders operating in conjunction with wheel struts to form a three-point support. Articulation enables the lift system to be adjusted on sloped or uneven terrain to maintain the mast in a vertical orientation. One use of the lift system is to carry a fruit picker into an orchard or vineyard and to position the picker to work efficiently. The lift system may carry a robot and may be controlled either locally or remotely.Type: GrantFiled: July 23, 2010Date of Patent: November 15, 2011Assignee: Roberts Equipment, Inc.Inventors: Roy Roberts, Fred K. O'Brien
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Patent number: 7982662Abstract: This scanning array scans an area around the array for nearby objects, collision obstructions, and terrain topography. The scanning array can scan for sounds emitted by objects in the vicinity of the scanning array, passive energy receipt sources, or it can also send out an energy beam and scan for reflections from objects within the energy beam. The energy beam can be optical, laser, radar or other energy emitting sources. The scanning array of the invention can be used for helicopter detection and avoidance of collision risk and can be used for other scanning purposes. Scanning of an entire hemisphere or greater is accomplished by manipulating the scanner platform through the coordination of either linear actuators or gimbals so as to produce nutation without rotation. This motion allows transceivers to be directly coupled to transmitting and sensing modules without the losses associated with slip rings and other coupling devices.Type: GrantFiled: December 8, 2009Date of Patent: July 19, 2011Assignee: Intellex, LLCInventor: James Shaffer
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Patent number: 7898009Abstract: Memory cells are constructed from double-gated four terminal transistors having independent gate control. DRAM cells may use one, two or three transistors. Single transistor cells are constructed either with or without a bit storage capacitor, and both NAND- and NOR-type Non-Volatile NVRAM cells, as well as Ferroelectric FeRAM cells, are described. For all cells, top gates provide conventional access while independent bottom gates provide control to optimize memory retention for given speed and power parameters as well as to accommodate hardening against radiation. In a single transistor cell without a capacitor, use of the bottom gate allows packing to a density approaching 2 F2. Using a ferroelectric material as the gate insulator produces a single-transistor FeRAM cell that overcomes the industry-wide Write Disturb problem. The memory cells are compatible with SOI logic circuitry for use as embedded RAM in SOC applications.Type: GrantFiled: February 22, 2007Date of Patent: March 1, 2011Assignee: American Semiconductor, Inc.Inventors: Dale G. Wilson, Kelly James DeGregorio, Stephen A. Parke, Douglas R. Hackler, Sr.
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Patent number: 7652330Abstract: A family of logic circuits is constructed from double-gated four terminal transistors having independent gate control. First and second inputs to each logic element are independently coupled to the top and bottom gates of a transistor. The output voltage developed at either the source or drain represents an output logic state value according to the designed logic element. In a dynamic configuration the drain is precharged to an appropriate voltage. Complementary static CMOS configurations are also shown. Bottom Gates not driven by logic inputs or control signals may be biased to control the speed and power of the described logic circuits. Specific designs are given for AND, NAND, XOR, XNOR, OR and NOR combinational logic elements.Type: GrantFiled: January 9, 2006Date of Patent: January 26, 2010Assignee: American Semiconductor, Inc.Inventors: Douglas R. Hackler, Sr., Stephen A. Parke
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Patent number: 7613377Abstract: A fiber optic splice organizer stores optical fiber splices and sufficient slack to permit the fibers to be readily separated, such as for reorganization or to remake a splice. Multiple hinges connect a plurality of fiber trays side by side to provide pivotable connections between trays. A flat orientation of the trays enables splicing and coiling of fibers as they are loaded into a tray. The trays then pivot into a fiber storage position. Special features of the hinges provide support for fibers and splices as they are loaded into the trays. The hinges protect the fibers as the trays are pivoted as well as when the trays are in their folded position for storage without requiring buffer tubes. Multiple architectures for the organization of fibers are enabled without violating minimal bend radii, and while providing for ease of separation of individual fibers or groups of fibers.Type: GrantFiled: August 26, 2008Date of Patent: November 3, 2009Inventors: Curtis Paul Gonzales, Tony L Brown
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Patent number: 7588474Abstract: This apparatus provides an automatic release of a resilient buoyant tether from a water-skimming board device. In use, a tether (100) is attached to a waterboard (50) at one end and secured to an anchor (30) at the other. By maneuvering the board, a rider (20) first stretches the tether and then releases the force stored in the stretched tether to propel the board (50) with rider over the water at high speed. As the board approaches the anchor point (30), the tether (100) automatically releases to reduce drag for an unencumbered ride. When used on a river, the described hook (140) and loop (120) apparatus is easily retrieved by the rider and reconnected to the board (50) in preparation for the next ride. Safety features ensure protection of the rider and of observers. The coupling mechanism may be built in to new water boards or retrofitted to others.Type: GrantFiled: July 11, 2007Date of Patent: September 15, 2009Inventor: William Taggart
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Patent number: 7562832Abstract: An absolute moisture sensor is coupled to a controller circuit with the combination being integrated into a single device as a moisture-activated switch. The resultant switch is coupled in series with a power control line of a moisture-controlling device and can be placed within the medium for which moisture is to be controlled. In one typical use, the switch is buried in soil for control of valves that supply irrigation water. Since the moisture sensor is selected to provide an absolute reading of moisture, the switch programs itself when power from an external source is first applied. A communication protocol provides for readout of sensor values and allows for a remote reset of the controller.Type: GrantFiled: January 17, 2008Date of Patent: July 21, 2009Assignee: Technical Development Consultants, Inc.Inventor: Scott K. Anderson
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Patent number: 7550699Abstract: A focus sensing system adaptable for use in microscopes or other optical systems incorporates a selective beam block. An outgoing reference beam, incident upon a target to be inspected, is reflected to become an incoming reference beam. A beam block inserted within the optical system selectively rejects unwanted reflections from surfaces other than the target allowing the desired incoming reference beam to be photodetected without interference from reflections off of surfaces that are not of interest. The photodetector generates an electronic signal corresponding to the displacement of the target from the ideal focal point. The electrical signal may be used to drive a servomechanism to displace either the target or the microscope objective lens to bring the target into focus.Type: GrantFiled: June 20, 2008Date of Patent: June 23, 2009Inventor: Daniel R. Marshall
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Patent number: 7518189Abstract: This independent double-gated transistor architecture creates a MOSFET, JFET or MESFET in parallel with a JFET. Its two gates may be configured to provide a four-terminal device for independent gate control, a floating gate device, and a double-gate device. First and second insulating spacers are disposed on opposing sides of the top gate with the first spacer between the source and the top gate and the second spacer between the drain and the top gate. Source and drain extensions extend proximate to the spacers and couple to the channel. The spacers shield the channel from the field effect of the source and drain and further resist compression of the channel by the source and drain. Truly independent control of the two gates makes possible many 2-, 3- and 4-terminal device configurations that may be dynamically reconfigured to trade off speed against power. The resulting transistors exhibit inherent radiation tolerance.Type: GrantFiled: February 25, 2006Date of Patent: April 14, 2009Assignee: American Semiconductor, Inc.Inventors: Douglas R. Hackler, Sr., Stephen A. Parke
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Patent number: 7418184Abstract: A fiber optic splice organizer stores optical fiber splices and sufficient slack to permit the fibers to be readily separated, such as for reorganization or to remake a splice. Multiple hinges connect a plurality of fiber trays side by side to provide pivotable connections between trays. A flat orientation of the trays enables splicing and coiling of fibers as they are loaded into a tray. The trays then pivot into a fiber storage position. Special features of the hinges provide support for fibers and splices as they are loaded into the trays. The hinges protect the fibers as the trays are pivoted as well as when the trays are in their folded position for storage without requiring buffer tubes. Multiple architectures for the organization of fibers are enabled without violating minimal bend radii, and while providing for ease of separation of individual fibers or groups of fibers.Type: GrantFiled: March 15, 2007Date of Patent: August 26, 2008Inventors: Curtis Paul Gonzales, Tony L. Brown
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Patent number: 7341025Abstract: A full body Gait Training Harness for children with disability may be modified for adult use to assist a trainer to teach functions such as walking with a proper gait and crawling. Shoulder straps attached to a torso-encircling belt cross at the trainee's back to eliminate slippage, allowing use on those who have no arms. Leg loops secure the harness to the thighs, rather than through the crotch, for a more secure and comfortable fit. Leg stabilization straps between the leg loops and the shoulders provide tension to encourage development of a proper gait and to prevent crossing of the trainee's legs. Shoulder handles allow a trainer to support a trainee from above without stooping, while a back handle may be used to lift a trainee or support them in a crawling position. Walking extension straps attached to the shoulders allow trainee independence while the trainer retains control.Type: GrantFiled: April 6, 2006Date of Patent: March 11, 2008Assignee: Lucky Bums, Inc.Inventors: Jeffery Streeter, Julie Streeter
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Patent number: 7312386Abstract: A resilient band holds a pick for a stringed musical instrument securely in contact with a thumb or finger of the instrumentalist. In one aspect this device appears as a ring that has been slit along its center line over a portion of its circumference, the slit then being separated to produce a Y-shape. The two arms and leg of the Y provide the pick with a three-point support that maintains stability of the pick against a finger in both strumming and plucking modes over a wide range of attack angles. The resiliency of the band serves to adapt to various fingers as well as to a variety of conventional picks according to the preferences of the user, including flat picks, thumb picks, and finger picks. Methods of manufacture are described.Type: GrantFiled: October 21, 2004Date of Patent: December 25, 2007Assignee: Grip Guitar Picks, Inc.Inventors: Drayth S. Sielaff, Rollie W. Sielaff
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Patent number: 6913583Abstract: The described Kneepad gives its wearer the advantage of being able to kneel without putting weight on the knee. This allows someone to kneel who may not otherwise be able to do so due to a knee replacement, or some other reason that disallows application of pressure to the knee. The support mechanism is composed of rugged, load-bearing materials, such as metal or plastics. Straps provide various means of adjustment for a correct fit when attached to the thigh of the wearer above the knee. The Kneepad can be quickly and easily removed and reapplied, and does not interfere with walking. An improvement over prior kneepads that placed the knee in contact with the kneeling surface, this invention does not involve such contact, since the thigh area above the knee takes all of the pressure of kneeling. With this invention many people who have not been able to kneel previously, may be able to do so. One alternate embodiment of the invention allows a wearer to lean on a sensitive elbow.Type: GrantFiled: June 19, 2003Date of Patent: July 5, 2005Assignee: Creations by B J H, LLCInventor: Bernadette Jestrabek-Hart
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Patent number: 6817823Abstract: The invention relates to a wafer transfer system that achieves high efficiency, as measured by throughput rate. This is accomplished in one instance by the combination of reliable transfer of single wafers between ports while being simultaneously rotated to accomplish notch alignment. Another instance allows for simultaneous tilting of a multitude of wafers, such as changing the entire load of a transfer cassette between horizontal and vertical orientations, rather than operating on individual wafers serially. Furthermore, the design of this system renders it usable in both left-handed and right-handed workflow arrangements, not requiring construction of mirror-image systems and thereby achieving an economy of scale in production and inventory of the wafer transfer system itself.Type: GrantFiled: September 10, 2002Date of Patent: November 16, 2004Assignee: Marian CorporationInventors: Edward R. Fix, William W. Becia, Douglas R. Farnlund, Sven Evers