Abstract: A power converter having a parallel resonant circuit, includes an inverter, a resonant circuit, a transformer comprising a primary circuit and a secondary circuit, control means for the inverter, the inverter being connected to the resonant circuit, which is intended to be connected to an output load via the transformer, the power converter wherein the inverter comprises a first half-bridge and a second half-bridge in parallel with the first half-bridge, a first inductor between the first half-bridge and the resonant circuit, a second inductor between the second half-bridge and the resonant circuit, and in that the first and second inductors have the same inductance and are coupled in the opposite direction to one another.

Abstract: The field of the invention is that of producing 3D electronic modules, compatible with components operating beyond 1 GHz. The invention relates to a 3D electronic module featuring an interconnection between a horizontal conductor and a vertical conductor to which it is connected exhibits, in a vertical plane, a non-zero curvature. It also relates to the associated production process.

Abstract: An apparatus for burning in electronic components, which includes a plurality of assemblies placed in a holder, each assembly comprising a printed circuit board on which are placed sockets intended to receive electronic components and a burn-in driver. The holder is at room temperature, and each assembly comprises a single chamber that is regulated to a temperature T°>80° C., in which chamber at least four sockets are placed. The printed circuit board forming one wall of the chamber, the burn-in driver is soldered directly to the printed circuit board on the side exterior to the chamber, with a single burn-in driver per chamber, and the assembly furthermore comprises means for dissipating only the thermal energy of operation of the burn-in driver.

Abstract: A DC voltage converter of the quasi-resonant Buck type includes an input port having a first terminal designed to receive a voltage level to be converted, an output port having a first terminal designed to supply a converted voltage level, a first switch connected in series to the first terminal of the input port and a regulation circuit configured for: generating a ripple voltage, rising or falling depending on a closed or open state of the first switch; generating a setpoint signal proportional to a difference between an average level of converted voltage and a reference voltage; performing a first comparison between the setpoint signal and the converted voltage level to which the ripple voltage has been added; and depending on the result of the first comparison, generating or not an activation signal on its output controlling the closing of the first switch for a predefined period.

Abstract: A 3D imaging optoelectronic module intended to be fixed to an image-forming device comprises: an optoelectronic sensor comprising a package with a chip electrically connected to a stack of at least one printed circuit board, the sensor and stack assembly molded in a resin and having faces according to Z with electrical interconnection tracks of the printed circuit boards. It comprises a thermally conductive rigid cradle in the form of a frame having a reference surface according to X, Y and: on a top surface: reference points intended to center and align the image-forming device in relation to the reference surface, fixing points to allow the fixing of the image-forming device, and an inner bearing surface having bearing points of the sensor adjusted to center and align the chip in relation to the reference surface.

Abstract: The invention relates to a 3D electronic module including, in a direction referred to as the vertical direction, a stack (4) of electronic dice (16), each die including at least one chip (1) provided with interconnect pads (10), this stack being attached to an interconnect circuit (2) for the module provided with connection bumps, the pads (10) of each chip being connected by electrical bonding wires (15) to vertical buses (41) that are themselves electrically linked to the interconnect circuit (2) for the module, a bonding wire and the vertical bus to which it is linked forming an electrical conductor between a pad of a chip and the interconnect circuit, characterized in that each electrical bonding wire (15) is linked to its vertical bus (41) by forming, in a vertical plane, an oblique angle (?2) and in that the length of the bonding wire between a pad of a chip of one die and the corresponding vertical bus is different than the length of the bonding wire between one and the same pad of a chip of another di

Abstract: A 3D electronic module comprises: two electrically tested electronic packages, each comprising at least one encapsulated chip and output balls on a single face of the package, referred to as the main face; two flexible circuits that are mechanically connected to one another, each being associated with a package, and which are positioned between the two packages, each flexible circuit comprising: on one face, first electrical interconnect pads facing the output balls of the associated package; at its end, a portion that is folded over a lateral face of the associated package; second electrical interconnect pads on the opposite face of this folded portion.

Abstract: A method of collective fabrication of 3D electronic modules, each 3D electronic module comprising a stack of at least two, surface transferable, ball grid electronic packages, tested at their operating temperature and frequency comprises: a step of fabricating reconstituted wafers, each reconstituted wafer being fabricated according to the following sub-steps in the following order: A1)) the electronic packages are placed on a first sticky skin, balls side, B1) molding of the electronic packages in the resin and polymerization of the resin, to obtain the intermediate wafer, C1) thinning of the intermediate wafer on the face of the intermediate wafer opposite to the balls, D1) removal of the first sticky skin and placing of the intermediate wafer on a second sticky skin, side opposite to the balls, E1) thinning of the intermediate wafer on the balls side face, F1) formation of a balls side redistribution layer, G1) removal of the second sticky skin to obtain a reconstituted wafer of smaller thickness than the

Abstract: A process for manufacturing at least one 3D electronic module each comprises a stack of electronic packages and/or printed wiring boards, wherein a stack is placed on an electrically interconnecting system comprising metal leads each having two ends.

Abstract: A method for collectively fabricating a reconstituted wafer comprising chips exhibiting connection pads on a front face of the chip, comprises: positioning the chips on an initial adhesive support, front face on the support, vapor deposition at atmospheric pressure and ambient temperature, of an electrically insulating layer on the initial support and the chips, having a mechanical role of holding the chips, transfer of the chips covered with the mineral layer onto a provisional adhesive support, rear face of the chips toward this provisional adhesive support, removal of the initial adhesive support, overlaying the chips onto a support of “chuck” type, front faces of the chips toward this support, removal of the provisional adhesive support, deposition of a resin on the support of “chuck” type to encapsulate the chips, and then polymerization of the resin, removal of the support of “chuck” type, production of an RDL layer active face side.

Abstract: A method for collectively fabricating a reconstituted wafer comprising chips exhibiting connection pads on a front face of the chip, comprises: positioning the chips on an initial adhesive support, front face on the support, vapor deposition at atmospheric pressure and ambient temperature, of an electrically insulating layer on the initial support and the chips, having a mechanical role of holding the chips, transfer of the chips covered with the mineral layer onto a provisional adhesive support, rear face of the chips toward this provisional adhesive support, removal of the initial adhesive support, overlaying the chips onto a support of “chuck” type, front faces of the chips toward this support, removal of the provisional adhesive support, deposition of a resin on the support of “chuck” type to encapsulate the chips, and then polymerization of the resin, removal of the support of “chuck” type, production of an RDL layer active face side.

Abstract: A method for fabricating a re-built wafer which comprises chips having connection pads, comprising: fabricating a first wafer of chips, production on this wafer of a stack of at least one layer of redistribution of the pads of the chips on conductive tracks designed for the interconnection of the chips, this stack being designated the main RDL layer, cutting this wafer in order to obtain individual chips each furnished with their RDL layer, transferring the individual chips with their RDL layer to a sufficiently rigid support to remain flat during the following steps, which support is furnished with an adhesive layer, with the RDL layer on the adhesive layer, depositing a resin in order to encapsulate the chips, polymerizing the resin, removing the rigid support, depositing a single redistribution layer called a mini RDL in order to connect the conductive tracks of the main RDL layer up to interconnection contacts, through apertures made in the adhesive layer, the wafer comprising the polymerized resin, the c

Abstract: A method for collective fabrication of 3D electronic modules comprises: the fabrication of a stack of reconstructed wafers, comprising validated active components, this stack including a redistribution layer; the fabrication of a panel of validated passive printed circuits which comprises: fabrication of a panel of printed circuits, electrical testing of each printed circuit, fitting of the validated printed circuits to an adhesive substrate, molding of the mounted circuits in an electrically insulating resin, called coating resin and polymerization of the resin, removal of the adhesive substrate, a panel comprising only validated printed circuits being thus obtained; bonding the panel with a stack (of reconstructed wafers); cutting the “stack of panel” assembly for the purpose of obtaining the 3D electronic modules.

Abstract: The invention relates to a process for flip-chip connection of an electronic component (D) to a substrate (B), characterized in that it comprises producing at least one interconnect pad (PC) by etching a thick conductive film and bonding it, by means of at least one conductive adhesive, between a receiving pad or area of said electronic component and a receiving pad or area (PAS) of said substrate.

Abstract: A process for the vertical interconnection of 3D electronic modules (100), a module comprising a stack of K electronic wafer levels (19) electrically connected together by conductors lying along the direction of the stack that is perpendicular to the plane of a wafer.

Abstract: A process for fabricating a reconstituted wafer that includes chips having connection pads on a front side of the chip, this process including positioning of the chips on an adhesive support, front side down on the support; deposition of a resin on the support in order to encapsulate the chips; and curing of the resin. Before deposition of the resin, the process includes bonding, onto the chips, a support wafer for positioning the chips, this support wafer having parts placed on one side of the chips.

Abstract: A method for collective fabrication of 3D electronic modules comprises: the fabrication of a stack of reconstructed wafers, comprising validated active components, this stack including a redistribution layer; the fabrication of a panel of validated passive printed circuits which comprises: fabrication of a panel of printed circuits, electrical testing of each printed circuit, fitting of the validated printed circuits to an adhesive substrate, moulding of the mounted circuits in an electrically insulating resin, called coating resin and polymerization of the resin, removal of the adhesive substrate, a panel comprising only validated printed circuits being thus obtained; bonding the panel with a stack (of reconstructed wafers); cutting the “stack of panel” assembly for the purpose of obtaining the 3D electronic modules.

Abstract: A three-dimensional display apparatus electromechanical system for displaying three-dimensional images without special viewing aids is disclosed. The electromechanical apparatus includes three flat surface screens, two rotating wheels or single screen not limited to other variations that will enable similar operation of the apparatus. The imaging system includes a CRT or similar device and control system to generate two-dimensional images to project the images at different depth locations through a focus system on to the moving projection screens.

Abstract: A process for the wafer-scale fabrication of CMS electronic modules starts from a wafer with metallized outputs, comprising electronic components molded in resin and, on one side, the external outputs of the electronic components on which a nonoxidizable metal or alloy is deposited, and of a printed circuit provided with oxidizable metal or alloy contact pads. In the process, the wafer is cut in predetermined patterns for obtaining reconfigured molded components that include at least one electronic component; the reconfigured components are assembled on the printed circuit, the metallized external outputs of the reconfigured components being placed opposite the metallized contact pads of the printed circuit; and these external outputs are connected solderlessly to the metallized contact pads of the printed circuit by means of a material based on an electrically conductive adhesive or ink.

Abstract: The invention relates to a 3D electronic module comprising a stack (100) of at least a first slice (10) and a second slice (30), the first slice (10) having on a face (101) at least one set (4) of electrically conductive protrusions (41), and the second slice (30) comprising at least one zone (61) of electrically insulating material, traversing the thickness of the slice. The second slice (30) comprises at least one electrically conductive element (3) traversing said slice in a zone (61) of electrically insulating material, able to receive a set (4) of protrusions (41) of the first slice (10).