Patents Assigned to 3D Labs, Inc., Ltd.
  • Planar byte memory organization with linear access
    Patent number: 6847370
    Abstract: A graphics memory architecture in which row addresses are permuted, in a basically tile-oriented storage architecture, so that fast parallel access is provided both by scanlines (for video operations) and also by tiles (for graphics operations).
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: January 25, 2005
    Assignee: 3D Labs, Inc., Ltd.
    Inventors: David Robert Baldwin, Nicholas J. N. Murphy