Abstract: A method and apparatus for canceling a near-end echo of a far-end signal for each channel of a voice over packet multi-channel communications gateway. The invention applies “off-the-shelf” coding mechanisms as well as novel coding schemes to provide fixed compression rate and with options to maintain perfect speech integrity on certain processing components, such as network echo canceller, acoustic echo canceller, Voice Activity Detector, Comfort Noise Generation, etc. The off-the-shelf compression algorithm includes LPC-10, G.723.1, G.729A. The alternatives are Wavelet transform, DPCM, and ADPCM, etc.

Abstract: The present invention relates to a barrel shifter for manipulating bits within computer words. The barrel shifter includes multiple multiplexer stages for rotating single and multiple words. In several embodiments, it provides a half-word alignment in a 2n-bit barrel shifter, rotates a single 32-bit data word or two 16-bit data words, rotates a 2n-bit data word or two 2n?1-bit data half-words, a method of operating a 2n-bit barrel shifter to rotate two 2n?1-bit data words, multiplexer stages for rotating the bits to the left or right based on control signals, such that the stages do not require 2:1 multiplexers between the first and second stages.

Abstract: A method and apparatus for controlling overflow in Viterbi decoder is disclosed. The present invention allows the metrics to use short words, and to grow freely, by the use of natural wrap-back when overflow occurs. The metric compare process monitors the occurrence of wrap-back and produces results accordingly. In accordance with one aspect of the invention, a “partial subtractions” is used for the compare processes by checking the most-significant bit of each “partial subtraction” result, instead of the carry bit, to determine the comparison result. Based on the comparison result, the metric will be selected, or updated, at the next stage.

Abstract: The present invention provides a register-indirect addressing mode using modulo arithmetic to transpose addresses for digital processing systems. The preferred systems and methods permit direct access of column data, which improves matrix computation significantly. The overhead of transpose mode is minimal because it can be implemented, if desired, by sharing hardware and/or software used in circular buffers. Transpose addressing mode also reduces program size and processor power consumed by reducing the sequence of instruction cycles.

Abstract: A method and apparatus for canceling a near-end echo of a far-end signal for each channel of a voice over packet multi-channel communications gateway. The invention applies “off-the-shelf” coding mechanisms as well as novel coding schemes to provide fixed compression rate and with options to maintain perfect speech integrity on certain processing components, such as network echo canceller, acoustic echo canceller, Voice Activity Detector, Comfort Noise Generation, etc. The off-the-shelf compression algorithm includes LPC-10, G.723.1, G.729A. The alternatives are Wavelet transform, DPCM, and ADPCM, etc.