Abstract: A host write based write ordering mechanism is used so the write ordering on the secondary system is derived from the write ordering applied by the host to the primary system. In this scheme any set of writes that was issued in parallel on the primary system may also be issued in parallel on the secondary system. The parallel writes provide better performance compared to absolute or strict write ordering allowing only one outstanding write per volume group.

Abstract: Numerous types of hardware devices and memory included in a computing system can be accessed with a universal interface that has common interface commands. The universal interface aids engineers and technicians working on the system. This is particularly useful in a data storage system that includes a plurality of nodes for providing access to a data storage facility.

Abstract: A method for a mix mode driver to accommodate traces of different lengths includes storing in the mix mode driver a set of one or more control signals and coefficient signals for a trace length. The one or more control signals select a number of the stages to generate a variable amplitude data output signal. Each stage is operable to increase or decrease a data signal, and each of the coefficient signals determines the magnitude of increase or decrease of the data input signal by a stage. A method for operating the mix mode driver includes generating the variable amplitude data output signal with one or more of the stages, and providing the variable amplitude data output signal to a trace.

Abstract: A chain of snapshots includes a more recent snapshot with a data block copied from a base volume, a less recent snapshot with a skip-pointer that leads to the data block in said more recent snapshot, and one or more intermediate snapshots between the more recent snapshot and the less recent snapshot in the chain of snapshots.

Abstract: A communication link protocol is provided for communicating between nodes of an interconnect system via a communication link. In one embodiment, the communication link protocol includes a direct memory access (DMA) command for writing a block of data from a local node to a remote node via the communication link; an administrative write command for writing data from a local node to registers in a remote node via the communication link for administrative purposes; a memory copy write command for writing a line of memory from a local node to a remote node via the communication link when any data is written into that line of memory; and a built in self test (BIST) command for testing the functionality of the communication link.

Abstract: An input circuit is provided for coupling to a source-synchronous multi-level bus carrying data, clock, and complementary clock signals. The clock and complementary clock signals have a less than full voltage swing than the data signal so they can act as reference voltages for the data signal. The circuit includes a first differential receiver having inputs coupled to the data and the clock signals, a second differential receiver having inputs coupled to the data signal and a reference signal, and a third differential receiver having inputs coupled to the data and the complementary clock signals. The circuit further includes first, second, and third flip-flops having data inputs coupled to outputs of the first, the second, and the third differential receivers, and clock inputs coupled to a delayed clock signal generated from the clock and the complementary clock signals. The outputs of the flip-flops determine the level of the data signal.

Abstract: A method is provided to align clock and data signals over a source-synchronous link. The method includes sending header data and a default clock signal over the link. The header indicates a start of a training packet and the default clock signal ensures that the header is received without error. The method further includes providing a long clock pulse, phase shifting the clock signal during the long clock pulse, and thereafter sending training data and the clock signal over the link. The above steps are repeated until the training data are received with error. At that point, the phase shift of the clock signal is saved as a boundary of an optimal alignment. The above steps are then repeated with the clock signal shifted in a different direction. Once another boundary is located, the boundary midpoint is saved as the phase shift that provides the optimal alignment.

Abstract: A method for archiving a log for a data storage system includes the steps of logging host inputs/outputs to the log, creating a snapshot of the log when it is full, resetting a next write offset to the start of the log after the snapshot is created while continuing the logging to the log, performing copy-on-write of the log to the snapshot, and archiving the snapshot to an archived log.

Abstract: A snapshot tree structure includes a base volume storing a current user data at a current time, a first read-only snapshot descending from the base volume, and a second read-only snapshot descending from the first read-only snapshot. The first read-only snapshot is created at a first time earlier than the current time. The first read-only snapshot stores a first data of the base volume at the first time before the first data is modified in the base volume. The second read-only snapshot is created at a second time earlier than the first time. The second read-only snapshot stores a second data of the base volume at the second time before the second data is modified in the base volume.

Abstract: A method for a mix mode driver to accommodate traces of different lengths includes storing in the mix mode driver a set of one or more control signals and coefficient signals for a trace length. The one or more control signals select a number of the stages to generate a variable amplitude data output signal. Each stage is operable to increase or decrease a data signal, and each of the coefficient signals determines the magnitude of increase or decrease of the data input signal by a stage. A method for operating the mix mode driver includes generating the variable amplitude data output signal with one or more of the stages, and providing the variable amplitude data output signal to a trace.

Abstract: A method for resynchronizing a first copy of data on a first storage system from a second copy of the data on a second storage system includes, at a regular checkpoint interval, the first storage system pushing data in its cache that were modified prior to a checkpoint time to its nonvolatile storage and saving the checkpoint time to its nonvolatile storage. The method further includes, at a regular snapshot interval greater than the checkpoint interval, the second storage system taking snapshots of the second copy of the data. When the first storage system has an uncontrolled shutdown, the second storage system determines the snapshot closest in time to the last checkpoint time and sends the difference between the last snapshot and the second copy of the data to the first storage system to recover data lost during the uncontrolled shutdown.

Abstract: A method for a mix mode driver to accommodate traces of different lengths includes sequentially shifting values of a data signal to a number of stages and sequentially amplifying the values of the data signal at least one stage. Depending on the length of trace for the data signal, the method further includes providing at least one amplifying coefficient to at least one stage and coupling a subset of the stages to an adder. The method finally includes outputting the data signal from the adder to the trace.

Abstract: A method for a name mapping module on a node to handle communication between a client process and a server process includes receiving from a client process a process handle and a message for a server process, mapping the process handle to an entry of the server process in a process table, reading the entry to retrieve (1) a node number of a node and (2) a process ID on the node, and sending the message with the process ID to the node. If the server process is not accepting messages, the method further includes waiting for the backup server process to take over for the server process before sending the message. If the server process or the node fails after the message was sent, the method further includes waiting for the backup server process to take over for the server process.

Abstract: A node controller for a data storage system having at least one node provides access to a data storage facility. The node controller is distinct from a computer-memory complex of the node. The node controller provides overall control for transferring data through the node.

Abstract: To communicate over a SCSI protocol, a first device allocates buffers for a dummy SCSI read command and sends the dummy SCSI read command to a second device. This dummy SCSI read command is not a request by the first device to read data from the second device but instead is an indication that the first device is ready to receive data from the second device. In response, the second device stores the dummy SCSI read command to a command queue until the second device wishes to send data to the first device. At that time, the second device removes the dummy SCSI read command from the command queue and sends a response to the dummy SCSI read command to the first device. This response includes data that the second device wishes to send to the first device. The first device then delivers the received data to a higher layer process.

Abstract: A method is provided for a data storage system to move data from a source logical disk (LD) region to a target LD region while the data storage system remains online to a host. The method includes determining if a region move will create excessive load so the data storage system appears offline to the host. If not, the method includes causing writes to the source LD region to be mirrored to the target LD region, causing data in the source LD region to be copied to the target LD region, blocking reads and writes to the data storage system, and flushing dirty cache in the data storage system. If flushing the dirty cache is fast so the data storage system appears online to the host, the method includes updating mappings of the virtual volume to the LD regions and resuming the reads and writes to the data storage system.

Abstract: A memory controller includes a gate circuit gating a data strobe signal from a memory device, a delay circuit delaying the data strobe signal from the gate circuit, a read buffer capturing values of a data signal from the memory device in response to the data strobe signal, a cumulative strobe counter incrementing a detected strobe count by the number of edges detected in the data strobe signal, and a control logic controlling the gate circuit and receiving the detected strobe count from the strobe counter. The control logic enables and disables the gate circuit after the start of a preamble and before the end of a postamble in the data strobe signal, respectively. When the memory controller is not expecting the data strobe signal from the memory device, the control logic compares the detected and the expected strobe counts and reports a strobe error when they do not match.

Abstract: A method is provided for a data storage system to change the RAID type, the layout characteristics, and the performance characteristics of a virtual volume mapped to logical disk regions in one or more logical disks while the data storage system remains online to a host. Another method is provided for a data storage system to consolidate space in one or more logical disks mapped to a virtual volume while the data storage system remains online to a host. The one or more logical disks can be consolidated to free unused chunklet regions for use in other logical disks.

Abstract: A method for new nodes to join a cluster in a serial sequence includes (a) a new node transmitting a first type of request to join the cluster and (b) the new node determining if it has to back off the first type of request. The new node has to back off if (1) it has received a second type of request to join the cluster from another new node, (2) it has received the first type of request with a higher sequence number from another new node, (3) it has received the first type of request with a lower node number from another new node, or (4) a member node of the cluster is in a busy state. The new node transmits the first type of request, receives the first type of request, and receives the second type of request through primary links to the new nodes and member nodes of the cluster.

Abstract: A method is provided for communicating data in an interconnect system comprising a plurality of nodes. In one aspect, the method includes: issuing a command packet from a first node, the command packet comprising a respective header quadword and at least one respective data quadword for conveying a command to a second node, wherein the command is selected from a group comprising a direct memory access (DMA) command, an administrative write command, a memory copy write command, and a built in self test (BIST) command; receiving the command packet at the second node; issuing an acknowledgement packet from the second node, the acknowledgement packet comprising a respective header quadword for conveying an acknowledgement that the command packet has been received at the second node.