Abstract: A memory device is disclosed. The memory device comprises a first metal layer and a first metal oxide layer coupled to the first metal layer. The first metal layer is also coupled to a second metal oxide, which in turn is couple to a second metal layer. The formation of the first metal oxide layer may occur in-situ when the first metal oxide layer has a Gibbs free energy that is lower than the Gibbs free energy for the formation of the second metal oxide layer. Control of the oxygen vacancy or ion concentrations of the first metal oxide layer and the second metal oxide layer is utilized in the information and the operation of the memory device. Selection of a dielectric constant and a thickness of the first and second metal oxide layer may be utilized to result in similar electrical field stress across the first metal oxide layer and the second metal oxide layer and improve the cycling robustness and data retention for the memory device.

Abstract: A memory device includes a first metal layer and a first metal oxide layer coupled to the first metal layer. The memory device includes a second metal oxide layer coupled to the first metal oxide layer and a second metal layer coupled to the second metal oxide layer.

Abstract: A resistive memory device is disclosed. The memory device comprises one or mo re metal oxide layers. An oxygen vacancy or ion concentrations of the one or more metal oxide layer is controlled in the formation and the operation of the memory device to provide robust memory operation.