Patents Assigned to A + Corp.
  • Publication number: 20060092746
    Abstract: The input data at address 0 is “00000000”, including many “0”s. The data at address 0 is inverted to “11111111”. At the same time, flag information “1” indicative of inversion is written into the flag bit of the same address 0. The input data at address 3 also includes many “0”s. Therefore, the data of address 3 is inverted, and flag information “1” is written. The input data at addresses 1 and 2 includes more “1”s than “0”s. Therefore, the data is not inverted, and flag information “0” is written. With regards to the written data, only the data at an address whose flag signal is “1” is inverted again in a reading mode to be eventually read out as a data output signal.
    Type: Application
    Filed: December 16, 2005
    Publication date: May 4, 2006
    Applicant: Renesas Technology Corp.
    Inventor: Koji Nii
  • Patent number: 7037825
    Abstract: A method for avoiding copper extrusion during a damascene process is disclosed. A semiconductor wafer including a substrate with at least one copper conductive wire on the substrate is provided. A dielectric layer on the copper conductive wire is formed. A damascene structure having an opening exposing a portion of the copper conductive wire is formed using the dielectric layer. A degassing process to make gas escape from the dielectric layer is performed. A barrier layer on portions of the exposed surface of the copper conductive wire and the damascene structure of the dielectric layer is formed. A conductive layer on the barrier layer is formed.
    Type: Grant
    Filed: September 6, 2004
    Date of Patent: May 2, 2006
    Assignee: United Microelectronics Corp.
    Inventor: Min-Chih Wang
  • Patent number: 7037940
    Abstract: Disclosed is a compound represented by the Structural Formula (I): Y is a covalent bond, a phenylene group or a substituted or unsubstituted straight chained hydrocarbyl group. In addition, Y, taken together with both >C?Z groups to which it is bonded, is a substituted or unsubstituted aromatic group. Preferably, Y is a covalent bond or —C(R7R8)—. R1 and R2 are independently an aryl group or a substituted aryl group, R3 and R4 are independently —H, an aliphatic group, a substituted aliphatic group, an aryl group or a substituted aryl group. R5–R6 are independently —H, an aliphatic group, a substituted aliphatic group, an aryl group or a substituted aryl group. R7 and R8 are each independently —H, an aliphatic or substituted aliphatic group, or R7 is —H and R8 is a substituted or unsubstituted aryl group, or, R7 and R8, taken together, are a C2–C6 substituted or unsubstituted alkylene group. Z is ?0 or ?S.
    Type: Grant
    Filed: May 14, 2004
    Date of Patent: May 2, 2006
    Assignee: Synta Pharmaceuticals Corp.
    Inventors: Keizo Koya, Lijun Sun, Shoujun Chen, Noriaki Tatsuta, Yaming Wu, Mitsunori Ono
  • Patent number: 7038267
    Abstract: A non-volatile memory cell is provided. The non-volatile memory at least includes a substrate, a gate, a first source/drain region, a composite dielectric layer and a second source/drain region. A trench is formed in a substrate and a gate is formed inside the trench. The first source/drain region is formed at the bottom of the trench. The composite dielectric layer is formed between the gate and the surface of the trench. The composite dielectric layer includes at least a charge-trapping layer. The second source/drain region is formed in the substrate next to the sides of the gate.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: May 2, 2006
    Assignee: Powerchip Semiconductor Corp.
    Inventors: Ko-Hsing Chang, Chiu-Tsung Huang
  • Patent number: 7038293
    Abstract: An apparatus in one example comprises a wafer portion that comprises a conduction layer. Upon exposure of the conduction layer during a etch of the wafer portion, the conduction layer serves to dissipate a portion of a charge buildup on the wafer portion during an etch of the wafer portion.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: May 2, 2006
    Assignee: Northrop Grumman Corp.
    Inventors: Youngmin A. Choi, Christine Geosling, Henry Abbink
  • Patent number: 7036733
    Abstract: A method for reading an automatically adaptive memory card and a memory card controller are provided. First, whether a present reading address of a reading command is the same as a previous reading address is determined. Next, when the present reading address is determined to be the same as the previous reading address, a response is output and a data is output in a data-lag mode to output the data after the response is outputted. On the other hand, when the present reading address is not the same as the previous reading address, the previous reading address is updated to be the present reading address, the response is output and the data is output in a data-parallel mode to output the data regardless of whether or not the response is outputted. Hence, the memory card with the invention is compatible with several card readers on the market.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: May 2, 2006
    Assignee: Winbond Electronics Corp.
    Inventors: Bar-Chung Hwang, Chung-Chih Chang
  • Patent number: 7038411
    Abstract: In the motor stop control device utilizable for the reel-type gaming machine 1, there are provided the stepping motor 70 having two pairs of excitation phases for rotating the reel 3 on the outer periphery of which a plurality of symbols are formed, the speed reduction mechanism 700 for transmitting rotation of the stepping motor 70 to the rotation shaft of the reel 3 with a predetermined speed reduction ratio and the main CPU 40 for conducting speed reduction treatment to reduce rotation speed of the stepping motor 70 and excitation treatment by 2-phase excitation against the stepping motor 70 when the motor stop command occurs.
    Type: Grant
    Filed: April 29, 2004
    Date of Patent: May 2, 2006
    Assignee: Aruze Corp.
    Inventors: Takao Nireki, Shingo Omomo, Yuuichirou Suzuki
  • Patent number: 7039032
    Abstract: A method and a system are disclosed for providing quality of service (QoS)-driven channel access within a basic service set (BSS) in a wireless network. A point coordinator (PC) station determines whether at least one of upstream traffic and side-stream traffic is scheduled to be transmitted from at least one non-PC station At least one available TO is allocated to each selected non-PC having at least one traffic to transmit. A multipoll frame containing information relating to at least two allocated TOs is then sent from the PC station containing information relating to each allocated TO.
    Type: Grant
    Filed: July 14, 2000
    Date of Patent: May 2, 2006
    Assignee: AT&T Corp.
    Inventors: Jin-Meng Ho, Wei Lin
  • Patent number: 7036577
    Abstract: A groundwater pumping apparatus includes an outer tube, an inner tube, a shield member, a vacuum unit and a pump unit. The outer tube is buried in ground, and has a water-passing portion at its lower part. The inner tube has a substantially same length as the outer tube, and is placed in the outer tube such that the inner tube is spaced from the outer tube. The inner tube has a groundwater inlet at its bottom end, which is provided at a position lower than a top end of the water-passing portion. The shield member shields top ends of the outer tube and the inner tube. The vacuum unit reduces a pressure in the inner tube. The pump unit pumps groundwater that comes in the inner tube through the groundwater inlet.
    Type: Grant
    Filed: July 31, 2001
    Date of Patent: May 2, 2006
    Assignees: Nippon Kensetsu Kikai Shoji Co., Ltd., Asahi Techno Corp.
    Inventors: Yoshiyuki Minamijima, Shigeyoshi Takahashi, Shuichi Matsumura, Toru Yamaguchi
  • Patent number: 7036292
    Abstract: A collapsible shipping container for lightweight materials, typically edible grain particles and flakes, including a box-like sealable container and a synthetic resinous lining element, all of which are disposable after a single usage. The containers are fully preassembled in collapsed condition for storage, and require only unfolding to erected condition prior to insertion of the liner, the filling of the liner with contents, the sealing of the liner, and the closing of the container with a lid or cover.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: May 2, 2006
    Assignee: Container Packaging Corp
    Inventor: Kenneth Kutner
  • Patent number: 7037815
    Abstract: A method for forming an ultra-shallow junction in a semiconductor substrate is provided. A semiconductor substrate having a top surface is prepared. A dielectric layer is then formed on the top surface. A first ion implantation process is carried out to implant a plurality of heavy ions into the dielectric layer at a first ion range Rp. Thereafter, a second ion implantation process is carried out to implant a plurality of less-heavy ions into the dielectric layer at a second ion range Rp. The second ion range Rp is smaller than said first ion range Rp. A portion of the plural less-heavy ions are decelerated by the previously implanted heavy ions and are implanted into the semiconductor substrate, thereby forming a ultra-shallow junction containing the less-heavy ions. Subsequently, the dielectric layer is completely removed.
    Type: Grant
    Filed: June 29, 2004
    Date of Patent: May 2, 2006
    Assignee: United Microelectronics Corp.
    Inventor: Yuan-Chang Lai
  • Patent number: 7038445
    Abstract: A device and method is taught for detection of flaws and localized wall loss in pipes made of ferromagnetic-based material. The device utilizes a magnetic field generator to create a horizontal magnetic field of flux. A pipe is passed through the magnetic field where a magnetic fluctuation detector, for example multiple groups of hall units, identifies fluctuations in the magnetic field.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: May 2, 2006
    Assignee: Scan Systems, Corp.
    Inventors: William T. Walters, Danny J. Uselton, Robert W. Speiser
  • Patent number: 7039009
    Abstract: A method for lightpath restoration in a reconfigurable optical network comprises the steps of naming each network addressable element in said reconfigurable optical network, determining current topology in said reconfigurable optical network, determining current resources in said reconfigurable optical network, requesting establishment of a lightpath, requesting reservation of restoration capacity, allocating the lightpath, and reserving the restoration capacity. Also disclosed is a method for lightpath restoration that comprises the steps of reserving restoration capacity, detecting transmission failures in the reconfigurable optical network, handling exceptions as a result of transmission failures, and allocating transmission capacity.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: May 2, 2006
    Assignee: AT&T Corp.
    Inventors: Sid Chaudhuri, Gisli Hjalmtysson, Jennifer Yates
  • Patent number: 7037793
    Abstract: A method of forming a transistor involves firstly forming at least one gate structure on a semiconductor substrate. Then, a surface cleaning process is performed. In the surface cleaning process, a chemical oxidation method is utilized for forming a first oxide layer on a surface of the semiconductor substrate not covered with the gate structure and the first oxide layer is removed subsequently. Finally, a selective epitaxial growth method is utilized for forming a first epitaxial layer on the surface of the semiconductor substrate.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: May 2, 2006
    Assignee: United Microelectronics Corp.
    Inventors: Chin-Cheng Chien, Ya-Lun Cheng, Yu-Kun Chen
  • Patent number: 7038304
    Abstract: A semiconductor memory device includes: a silicon substrate having a main surface; n+ diffusion layers formed on the main surface of the silicon substrate distanced from each other; HDP oxide films formed on the n+ diffusion layers and deposited on the main surface so as to protrude above the main surface; an ONO film (a stacked film of an oxide film, a nitride film, and an oxide film) as a charge holding layer formed between the HDP oxide films; and a gate electrode (a polysilicon film and a doped polysilicon film) extending over the ONO film and the HDP oxide films.
    Type: Grant
    Filed: July 21, 2004
    Date of Patent: May 2, 2006
    Assignee: Renesas Technology Corp.
    Inventor: Naoki Tsuji
  • Patent number: 7038739
    Abstract: An optical projection system comprising a light source, a beam splitter module, a plurality of spatial light modulators, an optical combiner module and a projection lens is provided. The light source is used for providing a first white light. The beam splitter module is disposed in the light path of the first white light to separate the first white light into a plurality of second white lights. The spatial light modulators are disposed in the light paths of the second white lights respectively. Each spatial light modulator comprises a color filter to modulate each second white light into a color light carrying with corresponding color image signal. The optical combiner module is disposed in the light paths of the color lights to combine the color lights. The projection lens is disposed in the light path of the combined color lights after the optical combiner module to project the combined color light to be an image.
    Type: Grant
    Filed: July 7, 2004
    Date of Patent: May 2, 2006
    Assignee: United Microelectronics Corp.
    Inventors: Da-Shuang Kuan, Tony Whitehead, Chia-Tsung Chan, Chia-Te Lin
  • Patent number: D519900
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: May 2, 2006
    Assignee: Midwest Motorcycle Supply Distributors Corp.
    Inventor: Kenneth A. Francis
  • Patent number: D520113
    Type: Grant
    Filed: April 9, 2004
    Date of Patent: May 2, 2006
    Assignee: Globe Union Industrial Corp.
    Inventor: Aaron Chu
  • Patent number: D520137
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: May 2, 2006
    Assignee: Fama Holdings International Corp.
    Inventors: Frank Melendez, Jaime Alberto Castano Angel
  • Patent number: D520204
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: May 2, 2006
    Assignee: Progressive International Corp.
    Inventor: Sarah Peterson