Patents Assigned to A + Corp.
  • Publication number: 20020059033
    Abstract: An emission measuring system and method provide an accurate, real-time calculation of a particular material emitted from an emission source. Specifically, a CEM system installed in an industrial stack can include a dilution probe located in the stack and a data analyzer that records and analyzes characteristic data of the materials sampled by the dilution probe. A dilution ratio is used to correct for the addition of dilution gas into the stack gas sample to determine the concentration of a particular material that is being emitted from the stack. The dilution ratio is based on a molar flow rate, which can be determined by using specific algorithms and measurements.
    Type: Application
    Filed: April 30, 2001
    Publication date: May 16, 2002
    Applicant: PPL Electric Utilities Corp.
    Inventors: James P. Batug, Carlos E. Romero, Ali Yilmaz, Edward K. Levy, Noel Moyer
  • Publication number: 20020058465
    Abstract: The method of the present invention is capable of abrading a work piece with fixed load. The method comprises: a first abrading process, in which pressure of a cylinder chamber of a cylinder unit suspending an upper abrasive plate is adjusted so as to apply first pressure to the work piece via the upper abrasive plate without applying full weight of the upper abrasive plate; and a second abrading process, in which the pressure of the cylinder chamber is readjusted so as to apply second pressure, which is higher than the first pressure, to the work piece via the upper abrasive plate without applying the full weight of the upper abrasive plate.
    Type: Application
    Filed: November 9, 2001
    Publication date: May 16, 2002
    Applicant: Fujikoshi Machinery Corp.
    Inventors: Tadakazu Miyashita, Tsuyoshi Hasegawa, Atsushi Kajikura, Norihiko Moriya
  • Publication number: 20020057077
    Abstract: A low power mode and feedback arrangement for a switching power converter. Two or more main power switches. such as transistors, transfer energy from a supply to load by their opening and closing. When the load requires a relatively low power level, this condition is detected. In response, one or more of the transistor switches is disabled from switching and the reduced power requirements of the load are handled by the remaining one or more transistor switches. As a result, switching losses are reduced. This is because parasitic gate capacitance and on-resistance associated with the disabled switches no longer consume power from the power source. The invention provides significant efficiency advantages during periods when the load draws a low level of power. This is especially useful for battery-powered devices which may operate in a low power mode for extended periods of time, such as standby mode as in a portable telephone.
    Type: Application
    Filed: January 9, 2002
    Publication date: May 16, 2002
    Applicant: Champion Microelectronic Corp.
    Inventor: Jeffrey H. Hwang
  • Publication number: 20020056891
    Abstract: An apparatus for cutting a laminated structure formed by two bonded glass substrates comprises a worktable, and at least one laser generator. The worktable has at least one liner opening, wherein the laminated structure is placed on the worktable and a predetermined scribing line on the laminated structure is aligned to the liner opening. The laser generator generates a first laser beam over the worktable and a second laser beam under the worktable. The first laser beam irradiates the predetermined scribing line on the upper glass substrate of the laminated structure. The second laser beam passes through the liner opening and irradiates the predetermined scribing line on the lower glass substrate of the laminated structure.
    Type: Application
    Filed: September 5, 2001
    Publication date: May 16, 2002
    Applicant: Hannstar Display Corp.
    Inventor: Gwomei Wu
  • Publication number: 20020059583
    Abstract: The present invention relates to a method of managing contents data for digital broadcasting. The method of the present invention includes the steps of a) collecting contents data for digital broadcasting in form of an application, b) designing an application definition file according to characteristics of respective contents contained in the application, c) inputting the designed application definition file and the application into a server, and d) Processing the application in accordance with the input application definition file. The application processed in the server by a method defined through a transmission standard for a digital broadcasting and the encoded application is generated to a transport stream then transported to the viewer.
    Type: Application
    Filed: July 27, 2001
    Publication date: May 16, 2002
    Applicant: Alticast Corp.
    Inventor: Moon-Young Kim
  • Publication number: 20020059348
    Abstract: The invention relates to an automatic documentation tool and associated method. The method includes embedding comments into a plurality of source files defining the design, creating a configuration file including parameters associated with each source file, and extracting the comments from each source file responsive to the parameters. The method is capable of operating on a plurality of source files originating from a plurality of design tools. The method is capable of sorting through keywords preceding each comment and ordering the comments according to a user's request. The method is capable of receiving register definitions from a header file.
    Type: Application
    Filed: November 14, 2001
    Publication date: May 16, 2002
    Applicant: Cypress Semiconductor Corp.
    Inventors: R. Samual Lee, Calvin K. McDonald
  • Publication number: 20020056699
    Abstract: A method of eliminating surface roughness of metal lines is disclosed, which can effectively improve the rough edges formed on the surface of the metal lines after wet etching during the manufacturing process of a thin film transistor, so that reliability is increased and current leakage can be avoided. The method includes the steps of: applying a tetra-methyl ammonium hydroxide solution to the rough surface of the metal lines and keeping the metal lines still for a predetermined time; and rinsing the metal lines to remove the tetra-methyl ammonium hydroxide solution left on the surface of the metal lines.
    Type: Application
    Filed: August 24, 2001
    Publication date: May 16, 2002
    Applicant: Hannstar Display Corp.
    Inventors: Chih-Chung Sun, Yao-Chung Chang
  • Publication number: 20020057076
    Abstract: A low power mode and feedback arrangement for a switching power converter. Two or more main power switches, such as transistors, transfer energy from a supply to load by their opening and closing. When the load requires a relatively low power level, this condition is detected. In response, one or more of the transistor switches is disabled from switching and the reduced power requirements of the load are handled by the remaining one or more transistor switches. As a result, switching losses are reduced. This is because parasitic gate capacitance and on-resistance associated with the disabled switches no longer consume power from the power source. The invention provides significant efficiency advantages during periods when the load draws a low level of power. This is especially useful for battery-powered devices which may operate in a low power mode for extended periods of time, such as standby mode as in a portable telephone.
    Type: Application
    Filed: January 9, 2002
    Publication date: May 16, 2002
    Applicant: Champion Microelectronic Corp.
    Inventor: Jeffrey H. Hwang
  • Publication number: 20020056868
    Abstract: A method for fabricating self-aligned DRAM cell with stack capacitor, which is comprised of providing a semiconductor substrate having a plurality of oxide isolation regions and MOS transistors formed thereon, each of the MOS transistors with a cap layer of silicon nitride and a silicon nitride spacer, wherein two adjacent MOS transistors are formed between two oxide isolation regions and the two adjacent MOS transistors share a source/drain region therebetween. Forming a plurality of first oxides on each of the oxide isolation regions and each of the MOS transistors by photolithography and etching method. Thereafter, utilizing photolithography and etching method, forming a plurality of conductive regions of MOS-like structure each of which with a cap layer of silicon nitride and a silicon nitride spacer, across over two first oxides on the two adjacent MOS transistors.
    Type: Application
    Filed: January 14, 2002
    Publication date: May 16, 2002
    Applicant: United Microelectronics Corp.
    Inventor: Tsung-Chih Wu
  • Publication number: 20020058386
    Abstract: A structure of a DRAM and a manufacturing process therefor, suitable for a substrate on which a plurality of word lines and a plurality of source/drain regions on sides of each of these word lines are formed. A plurality of bit line contacts and a plurality of node contacts are formed in electric contact with the source/drain regions. A first patterned insulating layer is formed on the substrate, in which a plurality of openings are formed in the insulating layer to expose the bit line contacts. The substrate is covered with a first conductive layer and a second insulating layer in sequence. The second insulating layer, the first conductive layer and the first insulating layer are patterned in sequence to form a plurality of bit line stacked structures and a plurality of bit lines electrically connecting to the bit contacts, exposing the node contacts. As a result, the bit line stacked structure forms a plurality of trenches and the bit line stacked structure is orthogonal to the word lines.
    Type: Application
    Filed: January 3, 2002
    Publication date: May 16, 2002
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventor: Jing-Horng Gau
  • Patent number: 6386275
    Abstract: The present invention proposes a surrounding type fin-retaining structure of heat radiator comprising a retaining tool and a plurality of fins. The retaining tool is integrally formed. The fins are formed by punching metal sheets. Each of the metal sheets comprises a main body provided with frills. Each of the frills has a groove with gaps at a predetermined position thereof. After the plurality of fins are tightly arranged together, the grooves on the frills will be tightly joined together to form a surrounding and closed shape. The retaining tool is manufactured to have the same size and shape as those of the grooves. The retaining tool is placed into the grooves and retained therein to fix the fins of a heat radiator.
    Type: Grant
    Filed: August 16, 2001
    Date of Patent: May 14, 2002
    Assignee: Chaun-Choung Technology Corp.
    Inventors: Dah-Chyi Kuo, Chen-Hsing Lee
  • Patent number: 6389402
    Abstract: The present invention provides systems and methods for secure transaction management and electronic rights protection. Electronic appliances such as computers equipped in accordance with the present invention help to ensure that information is accessed and used only in authorized ways, and maintain the integrity, availability, and/or confidentiality of the information. Such electronic appliances provide a distributed virtual distribution environment (VDE) that may enforce a secure chain of handling and control, for example, to control and/or meter or otherwise monitor use of electronically stored or disseminated information. Such a virtual distribution environment may be used to protect rights of various participants in electronic commerce and other electronic or electronic-facilitated transactions. Distributed and other operating systems, environments and architectures, such as, for example, those using tamper-resistant hardware-based processors, may establish security at each node.
    Type: Grant
    Filed: June 9, 1999
    Date of Patent: May 14, 2002
    Assignee: InterTrust Technologies Corp.
    Inventors: Karl L. Ginter, Victor H. Shear, Francis J. Spahn, David M. Van Wie
  • Patent number: 6388478
    Abstract: A circuit and method for implementing a configurable clock generator comprising a logic circuit, a configurable matrix and a phase-locked loop. The logic circuit may be configured to generate a plurality of control signals. The configurable matrix may comprise a plurality of interconnections that may be configured to (i) receive the plurality of control signals from the logic circuit and (ii) bus the control signals to the phase-locked loop. The plurality of control signals may control the operation of the phase-locked loop. In one example, the logic circuit may comprise a sea of gates logic array.
    Type: Grant
    Filed: February 13, 2001
    Date of Patent: May 14, 2002
    Assignee: Cypress Semiconductor Corp.
    Inventor: Eric N. Mann
  • Patent number: 6389552
    Abstract: By using advanced data communications transport methodology, remote electronic vaulting systems and methods provide a networked-based solution to facilitate the transportation of production data between the production data processing center and an off-site storage location. A local access network is used to facilitate data transport from the production data processing facility to the closest long-haul distance network point of presence facility. The point of presence facility houses an electronic storage device which provides the off-site storage capability. A user can then manipulate transportation to data from the production data processing center to the data storage facility using channel extension technology to store the data in electronic form on standard disk or tape storage devices. The user can then recall, copy or transmit the data anywhere on demand under user control by manipulating switching at the point of presence.
    Type: Grant
    Filed: December 31, 1998
    Date of Patent: May 14, 2002
    Assignee: AT&T Corp
    Inventors: Bruce Hamilton, Douglas N. Weldon
  • Patent number: 6389564
    Abstract: The invention relates to a memory having test units and its testing method. The memory comprises a plurality of word lines, a plurality of bit line groups each having two bit lines, a memory unit connected between each of the word lines and one bit line of each of the bit line groups, a plurality of writing units, a plurality of testing units, a plurality of bit line switches.
    Type: Grant
    Filed: July 26, 1999
    Date of Patent: May 14, 2002
    Assignee: United Microelectronics Corp.
    Inventor: Hsin Pang Lu
  • Patent number: 6388290
    Abstract: An integrated circuit comprising active and passive devices is formed in a thin slice of monocrystalline semiconductor bonded to a high resistivity polycrystalline silicon substrate. As compared with conventional integrated circuits supported on a monocrystalline substrate, circuits in monocrystalline films bonded to high resistivity polycrystalline substrates are less subject to parasitic capacitance, crosstalk and eddy currents. As compared with typical SOI wafers, the polycrystalline substrates have higher resistivity, and this resistivity is much less affected by contamination than it would be in monocrystalline substrates. Compared to silicon-on-sapphire or silicon on any other insulating material, the polycrystalline substrates are more compatible with the mechanical, thermal, and optical properties of the crystalline silicon layer.
    Type: Grant
    Filed: June 10, 1998
    Date of Patent: May 14, 2002
    Assignee: Agere Systems Guardian Corp.
    Inventors: George K. Celler, Yves Jean Chabal
  • Patent number: 6387813
    Abstract: A method for stripping a low dielectric film with a high carbon content from silicon monitor chip. The silicon monitor chip is placed inside a plasma-enhanced chemical vapor deposition chamber and the surface is treated with oxygen plasma to form a silicon-rich oxide layer. A high-carbon-content low dielectric film is formed over the silicon-rich oxide for film quality inspection. After the film inspection, the silicon monitor chip is immersed in a solution containing ammonium hydroxide and hydrogen peroxide so that the surface of the high-carbon-content dielectric film is transformed from hydrophobic to hydrophilic. Hence, wetting capacity of subsequently applied hydrofluoric acid solution is enhanced. Finally, the silicon monitor chip is immersed in a hydrofluoric acid solution for stripping away the low dielectric film.
    Type: Grant
    Filed: November 22, 2000
    Date of Patent: May 14, 2002
    Assignee: United Microelectronics Corp.
    Inventors: Neng-Hui Yang, Ming-Sheng Yang, Chih-Chien Liu
  • Patent number: 6388464
    Abstract: An apparatus comprising a memory device and a programmable logic device. The memory device may be configured to (i) connect to a first bus and a second bus and (ii) operate in one or more modes in response to one or more control signals. The programmable logic device may be configured to generate the control signals.
    Type: Grant
    Filed: December 30, 1999
    Date of Patent: May 14, 2002
    Assignee: Cypress Semiconductor Corp.
    Inventors: Timothy M. Lacey, David L. Johnson
  • Patent number: 6386109
    Abstract: An apparatus and method is provided to reduce interference resulting from activation of explosive devices. One type of interference is charge-to-charge interference, and another type of interference is pre-shock interference between a detonating cord and an explosive, such as a shaped charge. To reduce interference, one or more shock impeding elements are placed proximal one or more explosives to impede propagation of shock caused by detonation of the explosives. The shock impeding elements include a porous material, such as a porous liquid or solid. In another arrangement, a shock barrier may be positioned between a detonating cord and an explosive to reduce pre-shock interference. In yet another feature, an encapsulant may be provided around one or more shaped charges to enhance structural support for the shaped charges.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: May 14, 2002
    Assignee: Schlumberger Technology Corp.
    Inventors: James E. Brooks, Thomas H. Zimmerman, Daniel C. Markel, Wenbo Yang, James F. Shelton, Wallace E. Voreck
  • Patent number: 6389471
    Abstract: A system and method allow an Internet user to act as a broadcast session conductor by assembling audiovisual information in a multimedia document, and broadcasting that information to a predetermined group for simultaneous viewing. During the network broadcast, members of the predetermined group can interact with the Internet conductor using a standard telephone or other audio connection. The broadcast information may be used for such sessions as on-line training/teaching seminars, telemarketing, teleshopping and other multimedia events.
    Type: Grant
    Filed: July 7, 1998
    Date of Patent: May 14, 2002
    Assignee: AT&T Corp.
    Inventors: Sanjay Agraharam, Chia-Chang Li, Ram S. Ramamurthy, Peter H. Stuntebeck