Patents Assigned to A PLUS Co., Ltd.
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Patent number: 7092105Abstract: A method and apparatus for measuring the three-dimensional surface shape of an object using color informations of light reflected by the object. The method and apparatus for measuring the three-dimensional surface shape of the object, in which a real-time measurement of the three-dimensional surface is performed by projecting a beam of light having color information onto the object and detecting color distribution information according to levels of the object, thereby obtaining level information of the object.Type: GrantFiled: October 31, 2001Date of Patent: August 15, 2006Assignee: Intek Plus Co., Ltd.Inventors: Ssang-Gun Lim, Gee-Hong Kim, Yi-Bae Choi, Sang-Yoon Lee
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Patent number: 7042288Abstract: An object of the present invention is to provide a charge amplifier which can be operated at low cost so that electric charge generated in a piezoelectric pressure sensor having one end grounded is converted into a voltage signal. In the charge amplifier (1) according to an embodiment of the present invention, a plus side power source input terminal of an operational amplifier (5) is connected to a plus power source (+5 V) while a minus side power source input terminal of the operational amplifier (5) is grounded, so that the operational amplifier (5) is supplied with a single power source. Further, an offset voltage lower than the plus power source voltage but higher than the ground potential is applied to a non-inverted input terminal of the operational amplifier (5). Accordingly, change of pressure in both positive and negative directions can be converted into a voltage signal with the offset voltage as its center though the operational amplifier (5) is driven by a single power source.Type: GrantFiled: November 27, 2001Date of Patent: May 9, 2006Assignee: NGK Spark Plus Co., Ltd.Inventors: Masayoshi Matsui, Koji Okazaki
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Patent number: 6873421Abstract: An apparatus and method for measuring a three-dimensional shape of an object using a projection moiré device. The method comprises the steps of obtaining a grid pattern image projected on a reference plane of a moving table and applying a buckets algorithm thereto, thereby achieving a reference phase, obtaining a grid pattern image projected on the object set on the moving table and applying a buckets algorithm thereto, thereby achieving an object phase, calculating a difference phase between the object phase and the reference phase, thereby achieving a moiré phase, and unwrapping the moiré phase, thereby achieving a level information of the object. The apparatus and method measure the three-dimensional shape using a projection grid without a reference grid, thereby achieving compactness of equipment, simplicity in usage and manufacturing cost reduction.Type: GrantFiled: October 31, 2001Date of Patent: March 29, 2005Assignee: Intek Plus Co., Ltd.Inventors: Ssang-Gun Lim, Seung-Woo Kim, Sang-Yoon Lee, Chang-Jin Chung, Yi-Bae Choi, Young-Sik Cho, Kyung-Keun Park
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Publication number: 20040046171Abstract: A thin film transistor (TFT) including a polycrystalline active layer and a method for making the same are disclosed. An amorphous silicon layer is deposited on a substrate and is crystallized by using MILC (metal induced lateral crystallization) to provide a poly-silicon active layer of the TFT. Specifically, the amorphous silicon layer is poly-crystallized during a thermal treatment of the active layer. The thermal treatment causes the MILC of the active layer propagating from portions of the source and the drain regions on which MILC source metal is formed through the contact holes of the TFT.Type: ApplicationFiled: April 30, 2003Publication date: March 11, 2004Applicant: PT Plus Co. Ltd., a Korean corporationInventors: Seok Woon LEE, Seung Ki Joo
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Patent number: 6692996Abstract: The present invention relates to a method for crystallizing the active layer of a thin film transistor utilizing crystal filtering technique. According to the conventional metal induced lateral crystallization (MILC) method, amorphous silicon layer can be crystallized into poly-crystal silicon layer. According the crystal filtering technique of the present invention, amorphous silicon layer can be single-crystallized by filtering a single crystal component from the poly-crystal region being crystallized by MILC. The TFT fabricated including an active layer crystallized according to the present method has significantly improved electrical characteristics such as electron mobility and leakage current as compared to the TFT including a poly-crystal silicon active layer made by conventional methods. The invention also provides various TFT fabrication methods applying the crystal filtering technique.Type: GrantFiled: April 4, 2001Date of Patent: February 17, 2004Assignee: PT Plus Co., Ltd.Inventors: Seok Woon Lee, Seung Ki Joo
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Patent number: 6596573Abstract: A thin film transistor (TFT) including a polycrystalline active layer and a method for making the same are disclosed. An amorphous silicon layer is deposited on a substrate and is crystallized by using MJLC (metal induced lateral crystallization) to provide a poly-silicon active layer of the TFT. Specifically, the amorphous silicon layer is poly-crystallized during a thermal treatment of the active layer. The thermal treatment causes the MILC of the active layer propagating from portions of the source and the drain regions on which MILC source metal is formed through the contact holes of the TFT.Type: GrantFiled: April 4, 2001Date of Patent: July 22, 2003Assignee: PT Plus Co. Ltd.Inventors: Seok Woon Lee, Seung Ki Joo
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Patent number: 6548331Abstract: A method for fabricating a TFT including a crystalline silicon active layer is disclosed, in which the metal which induced the crystallization of the active layer is offset from a gate electrode utilizing a mask used to form a lightly doped drain (LDD) region or an offset junction region in the active layer. The TFT includes a silicon active layer crystallized by crystallization inducing metal and a gate electrode, and has an LDD region or an offset junction region formed in the vicinity of the channel region. The method for fabricating the TFT forms a metal offset region without using an additional photoresist forming process, and forms a LDD region by conducting a low density doping in the metal offset region. As a result, a transistor made according to the present invention has low leakage current in its off-state, and has stable electrical characteristics in its on-state.Type: GrantFiled: April 4, 2001Date of Patent: April 15, 2003Assignee: PT Plus Co. Ltd.Inventors: Seok Woon Lee, Seung Ki Joo
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Publication number: 20020074548Abstract: A thin film transistor (TFT) including a polycrystalline active layer and a method for making the same are disclosed. An amorphous silicon layer is deposited on a substrate and is crystallized by using MILC (metal induced lateral crystallization) to provide a poly-silicon active layer of the TFT. Specifically, the amorphous silicon layer is poly-crystallized during a thermal treatment of the active layer. The thermal treatment causes the MILC of the active layer propagating from portions of the source and the drain regions on which MILC source metal is formed through the contact holes of the TFT. The TFT fabricated according to the present invention has improved electrical characteristics such as electron mobility and leakage current. The present invention further improves the performance of the TFT by making the MILC boundary is formed outside of the channel region so that the MILC boundary may not adversely affect the operation of the TFT.Type: ApplicationFiled: April 4, 2001Publication date: June 20, 2002Applicant: PT Plus Co. Ltd.Inventors: Seok Woon Lee, Seung Ki Joo
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Publication number: 20020068392Abstract: A method for fabricating a TFT including a crystalline silicon active layer is disclosed, in which the metal which induced the crystallization of the active layer is offset from a gate electrode utilizing a mask used to form a lightly doped drain (LDD) region or an offset junction region in the active layer. The TFT includes a silicon active layer crystallized by crystallization inducing metal and a gate electrode, and has an LDD region or an offset junction region formed in the vicinity of the channel region. The method for fabricating the TFT forms a metal offset region without using an additional photoresist forming process, and forms a LDD region by conducting a low density doping in the metal offset region. As a result, a transistor made according to the present invention has low leakage current in its off-state, and has stable electrical characteristics in its on-state.Type: ApplicationFiled: April 4, 2001Publication date: June 6, 2002Applicant: PT Plus Co. Ltd.Inventors: Seok Woon Lee, Seung Ki Joo
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Publication number: 20020056839Abstract: The present invention relates to a method of crystallizing an amorphous silicon thin film by thermal annealing the amorphous silicon thin film vapor deposited on a substrate in order to form a polycrystalline silicon thin film, and a semiconductor device fabricated by the method. According to the present invention, it is constructed such that a light-absorbing layer having absorbance of light much higher than that of the substrate or the amorphous silicon thin film is formed around the amorphous silicon thin film and is heated by a lamp when crystallizing the amorphous silicon thin film vapor deposited on the substrate by rapid annealing. Therefore, the temperature of the amorphous silicon thin film can be raised while restraining the increase in temperature of the substrate to the utmost. Accordingly, the amorphous silicon thin film can be crystallized without deformation of the substrate.Type: ApplicationFiled: May 14, 2001Publication date: May 16, 2002Applicant: PT Plus Co. Ltd.Inventors: Seung Ki Joo, Yeo Geon Yoon, Tae Kyung Kim
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Publication number: 20020058365Abstract: The present invention relates to a method for crystallizing the active layer of a thin film transistor utilizing crystal filtering technique. According to the conventional metal induced lateral crystallization (MILC) method, amorphous silicon layer can be crystallized into poly-crystal silicon layer. According the crystal filtering technique of the present invention, amorphous silicon layer can be single-crystallized by filtering a single crystal component from the poly-crystal region being crystallized by MILC. The TFT fabricated including an active layer crystallized according to the present method has significantly improved electrical characteristics such as electron mobility and leakage current as compared to the TFT including a poly-crystal silicon active layer made by conventional methods. The invention also provides various TFT fabrication methods applying the crystal filtering technique.Type: ApplicationFiled: April 4, 2001Publication date: May 16, 2002Applicant: PT Plus Co. Ltd.Inventors: Seok Woon Lee, Seung Ki Joo
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Patent number: 5936403Abstract: The subject of the invention is a weak-field magnetic sensor with the following features: etched circuit coils are substituted for conventional coil technology. The sensor includes an amorphous core having epoxy bases stacked relative to one another on the top and bottom surfaces thereof. One epoxy base has a coil Y etched thereon. A second epoxy base has a coil X etched thereon. The remaining epoxy base has circular patterns etched thereon. The amorphous core is formed from at least two amorphous thin boards stacked on opposite sides of an epoxy base thin board. The epoxy base thin board has a particular pattern etched thereon and the capacity for vertical conductivity. The coil conductor size and position accuracy is controlled in increments of microns by the etching process. The range of detection errors and the level of reception has no non-uniformities. A thin and small sensor in terms of the structure is therefore enabled.Type: GrantFiled: December 27, 1995Date of Patent: August 10, 1999Assignee: A PLUS Co., Ltd.Inventor: Yasuhiro Tamura