Abstract: Provided is a package substrate including a dielectric layer having a first surface and a second surface opposite to the first surface; an insulating layer formed on the first surface of the dielectric layer and having a plurality of grooves; a first circuit layer formed in the plurality of grooves and flush with the insulating layer; a second circuit layer formed on the second surface of the dielectric layer; and a plurality of conductive pillars formed in the dielectric layer and electrically connected to the first circuit layer and the second circuit layer. The present disclosure further provides a method of manufacturing the package substrate.

Abstract: An electronic package is provided, in which a cover layer is embedded in a circuit structure to form a groove, and an electronic element is disposed on the cover layer in the groove. A cladding layer encapsulates the electronic element, and an external connection structure is disposed on the circuit structure and the cladding layer. Therefore, the electronic element is embedded in the groove, such that a thickness of the electronic package can be greatly reduced to meet the requirement of thinning.

Abstract: A package substrate is provided, in which the package substrate is fabricated by using a thin core board body with a thickness of at most 20 micrometers, such that the package substrate can meet the requirement of thinning and avoid reliability problems. A method of fabricating the package substrate is also provided.

Abstract: A package substrate is provided, in which a first circuit structure and a second circuit structure with the same specification are formed on opposite sides of a core board body, respectively, and a wiring structure of another specification is formed on the first circuit structure. In addition, the number of wiring layers of the second circuit structure is greater than the number of wiring layers of the first circuit structure to form an asymmetric package substrate. Therefore, by configuration of the wiring structure, the problem of warpage caused by uneven stress can be prevented from occurring to the package substrate.

Abstract: A package substrate is provided, in which a second dielectric layer with a smaller CTE and a third dielectric layer with a larger CTE are formed on two opposite sides of a wiring structure including a first dielectric layer, respectively, so as to avoid too large a difference in CTE of the wiring structure between two sides thereof, thereby preventing warpage from occurring to the package substrate.