Patents Assigned to ACACIA COMMUNICATIONS INC.
-
Patent number: 12232264Abstract: In an embodiment, an apparatus and system comprising a first inductor with a first diameter; and a switched inductor including a metal layer and a switch; wherein when the switch is closed the switch connects the metal layer of the switched inductor to form an inductor with a parallel circuit enabling current to flow through the switched conductor; and wherein when the switch is open, current is not enabled to flow through the switched conductor. In another embodiment, a method for tuning a high-Q inductor, the method comprising closing a switch of a switched inductor, wherein the switch connects the switched inductor to a first inductor; wherein closing the switch enables current to flow though the switched inductor as well as the first inductor to change the inductance of the high Q inductor.Type: GrantFiled: September 9, 2019Date of Patent: February 18, 2025Assignee: ACACIA COMMUNICATIONS, INC.Inventors: Ian Dedic, David Enright, Darren Walker, Tarun Gupta
-
Patent number: 12184301Abstract: An apparatus, method, and system for converting a charge to a voltage.Type: GrantFiled: July 13, 2021Date of Patent: December 31, 2024Assignee: ACACIA COMMUNICATIONS, INC.Inventors: Ian Dedic, Gavin Allen, Ramesh K. Singh
-
Patent number: 12181583Abstract: A method for scanning a scene is disclosed. According to the method, light is transmitted by a transmitter through a transmitter surface grating array, as a first elliptical pattern in a first lateral direction. Light is received by a receiver through a receiver surface grating array, from an area of a second elliptical pattern. The received light is reflected from the first elliptical pattern. The first elliptical pattern is orthogonal to the second elliptical pattern. The first elliptical pattern overlaps with the second elliptical pattern.Type: GrantFiled: April 4, 2022Date of Patent: December 31, 2024Assignee: ACACIA COMMUNICATIONS, INC.Inventors: Christopher Doerr, Long Chen
-
Patent number: 12177059Abstract: A method, apparatus, and computer program product for estimated transmit skew comprising restoring an I component and a Q component of a signal, extracting clock information from the I component, extracting clock information from the Q component, and determining the skew between the I component and the Q component using the extracted clock information from the I component and the extracted clock information from the Q component.Type: GrantFiled: December 5, 2023Date of Patent: December 24, 2024Assignee: ACACIA COMMUNICATIONS, INC.Inventor: Hongbin Zhang
-
Patent number: 12147073Abstract: Disclosed herein are designs, structures and techniques for advanced packaging of multi-function photonic integrated circuits that allow such high-performance multi-function photonic integrated circuits to be co-packaged with a high-performance multi-function ASIC thereby significantly reducing strenuous interconnect challenges and lowering costs, power and size of the overall devices.Type: GrantFiled: February 26, 2020Date of Patent: November 19, 2024Assignee: ACACIA COMMUNICATIONS, INC.Inventors: Christopher Doerr, Eric Swanson, Diedrik Vermeulen, Saeid Azemati, Jon Stahl
-
Patent number: 12143158Abstract: A method, system, and apparatus for emulating impairments in a communication system.Type: GrantFiled: June 2, 2023Date of Patent: November 12, 2024Assignee: ACACIA COMMUNICATIONS, INC.Inventors: Antonio Caballero Jambrina, Miquel Mestre Adrover, Pierre Humblet
-
Patent number: 12130656Abstract: A method system, and apparatus for adjusting skew in a circuit comprising feeding an input clock into a first push-pull source follower stage, feeding an inverse of an input clock bar into a first CMOS inverter stage, creating an output clock based on an equal contribution of the input clock of the first push-pull follower stage and the inverse of the input clock bar of the first CMOS invert stage, feeding the input clock bar into a first push-pull source follower stage, feeding an inverse of the input clock into a first CMOS inverter stage, and creating an output clock based on an equal contribution of the input clock bar of the first push-pull follower stage and the inverse of the input clock bar of the first CMOS invert stage.Type: GrantFiled: June 29, 2023Date of Patent: October 29, 2024Assignee: ACACIA COMMUNICATIONS, INC.Inventors: Gavin Allen, Ian Dedic, Bo Yang, Taran Gupta
-
Patent number: 12107544Abstract: An apparatus comprising two inductors; wherein the two inductors are layered on top of each other in different layers of metal of a circuit; wherein each inductor of the inductor has a set of turns; wherein the current path of the two inductors is in the same direction.Type: GrantFiled: November 15, 2019Date of Patent: October 1, 2024Assignee: ACACIA COMMUNICATIONS, INC.Inventors: Ian Dedic, Gavin Allen, David Enright, Guojun Ren
-
Patent number: 12078876Abstract: Integrated wavelength selectors are described. The wavelength selector may include silicon nitride ring resonator disposed vertically between a heater and a temperature sensor. The temperature sensor may be formed of silicon in some embodiments. The wavelength selector may be coupled to the output port of a tunable laser, or may be disposed within a laser cavity.Type: GrantFiled: January 13, 2023Date of Patent: September 3, 2024Assignee: ACACIA COMMUNICATIONS, INC.Inventor: Long Chen
-
Patent number: 11892690Abstract: A photonic integrated circuit may be coupled to an optical fiber and packaged. The optical fiber may be supported by a fiber holder during a solder reflow process performed to mount the packaged photonic integrated circuit to a circuit board or other substrate. The optical fiber may be decoupled from the fiber holder, and the fiber holder removed, after completion of the solder reflow process.Type: GrantFiled: June 3, 2022Date of Patent: February 6, 2024Assignee: ACACIA COMMUNICATIONS, INC.Inventor: Christopher Doerr
-
Patent number: 11860046Abstract: A system and method of measuring a temperature including applying a first set of voltages across a circuit in sequence; detecting a second set of voltages corresponding to the first set of voltages, wherein the second set of voltages includes a first detected voltage, a second detected voltage, and a third detected voltage, wherein the first applied voltage corresponds to the first detected voltage, the second applied voltage corresponds to the second detected voltage, and a third applied voltage corresponds to the third detected voltage; modifying an output of a heater proximate to the diode within the circuit, wherein a combined heat dissipation of the heater and the diode remains constant during operation of the circuit; and determining a temperature proximate to the diode based on the first set of voltages and the second set of voltages.Type: GrantFiled: February 25, 2021Date of Patent: January 2, 2024Assignee: ACACIA COMMUNICATIONS, INC.Inventors: Ryan Moore, Christopher Doerr
-
Patent number: 11822359Abstract: A current-balanced voltage source may include two regulated voltage sources, each having an input and an output, and an amplifier to receive a control voltage at a positive input and a feedback voltage at a negative input. The output of each amplifier is coupled to the input of the respective regulated voltage source. The outputs of the regulated voltage sources are coupled together to source a current to a load. A differential amplifier may include positive and negative differential inputs, and positive and negative differential outputs. The positive differential input is coupled to the output of the first regulated voltage source and the negative differential input is coupled to the output of the second regulated voltage source. The positive differential output provides the feedback to the first regulated voltage source, and the negative differential output provides the feedback to the second regulated voltage source.Type: GrantFiled: August 25, 2021Date of Patent: November 21, 2023Assignee: ACACIA COMMUNICATIONS, INC.Inventors: Yuval Shohet, Robert Manlick
-
Publication number: 20230155683Abstract: Aspects of the present disclosure are directed to a photonic integrated circuit (PIC) having a resistivity-engineered substrate to suppress radio-frequency (RF) common-mode signals. In some embodiments, a semiconductor substrate is provided that comprises two portions having different levels of resistivity to provide both suppression of common mode signals, and reduction of RF absorption loss for non-common mode RF signals. In such embodiments, a bottom portion of the semiconductor substrate has a low resistivity to suppress common mode via RF absorption, while a top portion of the semiconductor substrate that is adjacent to conductors in the IC has a high resistivity to reduce RF loss.Type: ApplicationFiled: January 6, 2023Publication date: May 18, 2023Applicant: ACACIA COMMUNICATIONS, INC.Inventors: Long Chen, Leonard Jan-Peter Ketelsen
-
Patent number: 11650477Abstract: Disclosed herein are methods, structures, apparatus and devices for the termination of unused waveguide ports in planar photonic integrated circuits with doped waveguides such that free-carrier absorption therein may advantageously absorb any undesired optical power resulting in a significant reduction of stray light and resulting reflections.Type: GrantFiled: December 21, 2016Date of Patent: May 16, 2023Assignee: ACACIA COMMUNICATIONS, INC.Inventor: Long Chen
-
Patent number: 11563136Abstract: In part, in one aspect, the disclosure relates to a system including a photonic integrated circuit (PIC) assembly, comprising a PIC comprising: a first bond pad disposed inward from an edge of the PIC a first distance; and a first wire having a first length, the first wire electrically connected to the first bond pad and extending therefrom, wherein the first distance is greater than 0.4 mm.Type: GrantFiled: July 15, 2020Date of Patent: January 24, 2023Assignee: ACACIA COMMUNICATIONS, INC.Inventor: John Heanue
-
Patent number: 11556020Abstract: Integrated wavelength selectors are described. The wavelength selector may include silicon nitride ring resonator disposed vertically between a heater and a temperature sensor. The temperature sensor may be formed of silicon in some embodiments. The wavelength selector may be coupled to the output port of a tunable laser, or may be disposed within a laser cavity.Type: GrantFiled: July 29, 2020Date of Patent: January 17, 2023Assignee: ACACIA COMMUNICATIONS, INC.Inventor: Long Chen
-
Patent number: 11552710Abstract: Aspects of the present disclosure are directed to a photonic integrated circuit (PIC) having a resistivity-engineered substrate to suppress radio-frequency (RF) common-mode signals. In some embodiments, a semiconductor substrate is provided that comprises two portions having different levels of resistivity to provide both suppression of common mode signals, and reduction of RF absorption loss for non-common mode RF signals. In such embodiments, a bottom portion of the semiconductor substrate has a low resistivity to suppress common mode via RF absorption, while a top portion of the semiconductor substrate that is adjacent to conductors in the IC has a high resistivity to reduce RF loss.Type: GrantFiled: August 17, 2020Date of Patent: January 10, 2023Assignee: ACACIA COMMUNICATIONS, INC.Inventors: Long Chen, Leonard Jan-Peter Ketelsen
-
Patent number: 11171728Abstract: Designs, methods, and applications for fault localization and fiber security in optical transponders is described. In one embodiment a two-way time transfer protocol or other suitable method for synchronizing clocks between distant transponders is used. The clock synchronized transponders have digital signal processing to continually detect high precision time-histories of physical layer attributes in the transmission between the two transponders. Physical layer attributes can include: state-of-polarization changes, changes in polarization-mode-dispersion, change in propagation delay, changes or loss-of-light, changes in OSNR, changes in BER between the two nodes. By recording these physical layer changes and time-stamping them information on the magnitude and estimated location of the changes can be inferred by from the time records. In one aspect the method may be used in a distributed optical sensor for monitoring trespassing events that are a risk to fiber security of an optical transmission link.Type: GrantFiled: June 2, 2017Date of Patent: November 9, 2021Assignee: ACACIA COMMUNICATIONS, INC.Inventors: Eric Swanson, Graeme Pendock
-
Publication number: 20140147079Abstract: Techniques, methods, structures and apparatus that provide the efficient coupling of light to/from one or more optical fibers to/from planar grating waveguide couplers positioned on photonic integrated circuits.Type: ApplicationFiled: April 26, 2013Publication date: May 29, 2014Applicant: ACACIA COMMUNICATIONS INC.Inventor: ACACIA COMMUNICATIONS INC.
-
Publication number: 20130233824Abstract: A method for fabricating a grating coupler having a bottom mirror in a semiconductor wafer including etching a trench from a top surface of a wafer and around a grating coupler formed in the wafer; etching a void underneath the grating coupler; etching a via into the void from the backside of the wafer; and depositing a mirror on the bottom of the grating coupler. Alternatively, additional oxide may be deposited on the bottom of the grating coupler prior to the deposition of the mirror such that a desirable oxide thickness on the bottom is achieved.Type: ApplicationFiled: January 2, 2013Publication date: September 12, 2013Applicant: ACACIA COMMUNICATIONS INC.Inventor: Christopher DOERR