Abstract: An apparatus of a data storage device is provided. The data storage device is connected to a host system via a peripheral component interconnect express (PCIe) interface. The host system includes a first memory having a plurality of first memory space addresses. The data storage device comprises a second memory, a non-transparent bridge (NTB) and a processor. The NTB is coupled to the host system, and having a first portion and a second portion. The processor coupled between the NTB and the second memory, wherein the first portion of the NTB and the plurality of first memory space addresses have a first mapping relationship therebetween, and the processor writes a first datum in the first memory into the second memory via the first mapping relationship according to a command from the host system.

Abstract: A method for operating a switch is provided. The switch shares a resource between a plurality of thunderbolt (TB) hosts and at least a TB device, and includes a plurality of non-transparent bridges. The method includes steps of establishing a memory address mapping between each the non-transparent bridge and the TB device; providing a plurality of protocol-converting media for the plurality of TB hosts, wherein each the protocol-converting medium is converted between a first protocol and a second protocol; and causing the plurality of protocol-converting media to be converted between the first protocol and the second protocol simultaneously so as to allow the resource to be shared between the plurality of TB hosts and the TB device simultaneously.

Abstract: An XOR circuit, a RAID device which can recover several failures and method thereof are provided. A Galois field data recovery circuit having two or more sets of Galois Field engine circuits which are used in the XOR circuit, is one which can generate high efficient parity engine and high efficient flow data route and which at the same time correct the three or more failures during operation of the RAID device.

Abstract: The present invention provides a RAID controller and an operation method thereof, to avoid buffer data loss due to accidental power loss for a long period of time. The RAID controller comprises a first memory, a switch and a functional module. The first memory stores a buffer data. The switch is coupled to the first memory. The functional module is coupled to the switch, and has a second memory. The functional module causes the switch to be connected to the first memory based on a pre—determined instruction, to backup the buffer data by means of the second memory.

Abstract: A method of creating a multiple of virtual Serial Advanced Technology Attachment ports in a disk array controller, and the method builds a port multiplier in a Serial Advanced Technology Attachment disk array controller by a software method, and the port multiplier defines several slices capable of identifying the address of a computer host system. The port multiplier is connected to at least one disk set, and each disk is divided into several data blocks corresponding to data blocks of another disk of the same disk set to constitute a synchronously updated disk backup system. The software method provides a method of connecting several storage units to overcome the restriction on the point-to-point connection of the Serial Advanced Technology Attachment disk array system, so as to achieve a multi-driving function and a serial bus system.

Abstract: An XOR circuit, a RAID device which can recover several failures and method thereof are provided. A Galois field data recovery circuit having two or more sets of Galois Field engine circuits which are used in the XOR circuit, is one which can generate high efficient parity engine and high efficient flow data route and which at the same time correct the three or more failures during operation of the RAID device.

Abstract: An XOR circuit, a RAID device which can recover several failures and method thereof are provided. A Galois field data recovery circuit having two or more sets of Galois Field engine circuits which are used in the XOR circuit, is one which can generate high efficient parity engine and high efficient flow data route and which at the same time correct the three or more failures during operation of the RAID device.

Abstract: The present invention discloses a job-based structure using a process as a data processing and transmission unit. The structure includes a main system, and a disk array system. The main system includes an interface controller connected to the disk array system. The disk array system includes a job queue controller, a PRD table controller, a DMA controller and a storage device connected through a DMA bus. The DMA controller executes an instruction transmitted through the interface controller according to a request of the main system, and the instruction is decomposed into a number of processes for the job queue controller to access a storage device sequentially. The accessed data is transmitted to the job queue controller in terms of processes and responded to the main system sequential. Therefore the invention can improve the processing efficiency of the main system.

Abstract: A modular structure of a storage device applied in a network attached storage (NAS) system includes: a control device, having a system board, and the system board having a positioning board and a positioning space; a storage device, installed on the positioning space of the system board, and having a shock-resisting element sheathed onto the storage device; a casing, covered onto the storage device, and having a connecting device disposed on the casing; and a ventilating device, covered on an external side of the casing, and having a ventilation body and a ventilation passage interconnected with each other, and a ventilation opening disposed at an end of the ventilation passage. The storage device can be expanded by a modular design, and the invention can achieve better shock resisting and heat dissipating effects of the storage device, so as to enhance the stability, safety and competitiveness of the storage device.

Abstract: The present invention discloses a microdisk array apparatus using semiconductor automated equipment, and the apparatus is installed into a space of a 3.5-inch IDE hard disk of the semiconductor equipment to substitute the hard disk directly. The apparatus includes a frame, and the frame has a connecting interface, a disk array controller and storage devices. During use, the semiconductor equipment stores, reads, updates and copies data with the storage devices through the connecting interface and the disk array controller. The storage device can be a 2.5-inch IDE hard disk or solid state disk. Since the IDE hard disk becomes a mainstream storage device of the semiconductor equipment, and the solid state disk has the quiet, fast, compact and long-life features, the apparatus is compatible to the storage devices of these two specifications, so as to provide better data storage and backup.

Abstract: This invention discloses a method of creating a multiple of virtual SATA ports in a disk array controller, and the method builds a port multiplier in a SATA disk array controller by a software method, and the port multiplier defines several slices capable of identifying the address of a computer host system. The port multiplier is connected to at least one disk set, and each disk is divided into several data blocks corresponding to data blocks of another disk of the same disk set to constitute a synchronously updated disk backup system. The software method provides a method of connecting several storage units to overcome the restriction on the point-to-point connection of the SATA disk array system, so as to achieve a multi-driving function and a serial bus system. The invention also has the features of a low pin count and a high-frequency transmission.

Abstract: A correction method for reading data of a disk array system used for data security and backup of RAID 1 specifies one or more buffers for storing and reading data and an extra buffer. The buffers store data read by the disk array system from a computer system, and the extra buffer temporarily stores the same instruction issued by the disk array controller and the read data of the backup disk from the disk array system. The timeout parameter for the extra buffer to execute the same instructions of reading and returning data to the computer system can be set by users. If the disk array controller executes a read instruction of the computer system and a predetermined timeout parameter expires, the extra buffer will execute the instruction of reading and return the same data to the computer system, so as to reduce the wait time and enhance the reliability.

Abstract: The present invention discloses a disk array device including a connection interface, a disk array controller and at least one set of flash memories. The connection interface is electrically connected to an electronic appliance, such that the electronic appliance can be connected to the disk array device through the connection interface for an application, and the disk array controller controls the storage and reading of data in the disk array device. The flash memories are provided for storing and backing up data, so that data can be transmitted between the disk array device and the electronic appliance. The disk array device developed from the flash memories has the features of a quiet and fast storage, a light, thin, short and compact design, and a convenient carry, so as to provide better data storage and backup.

Abstract: A method for maintaining disk array access management information specifies a specific area in a random access memory (RAM) of a computer system or a disk array controller for storing management information of a disk array. The management information area is defined as a disk in the disk array and updated synchronously with the management information of a disk in the disk array. When the disk stores data by an array, the management information of the disk array will be saved synchronously into the management information area of the RAM. If all disks are hot plugged or unplugged, the disk array controller retrieves the updated management information from the RAM of the computer system or disk array controller, and saves the management information back into all disks after the installation of disks is completed, so as to prevent the disk array controller from being unable to operate.

Abstract: An XOR circuit, a RAID device which can recover several failures and method thereof are provided. A Galois field data recovery circuit having two or more sets of Galois Field engine circuits which are used in the XOR circuit, is one which can generate high efficient parity engine and high efficient flow data route and which at the same time correct the three or more failures during operation of the RAID device.

Abstract: A disk controller, and more particularly, a redundant arrays of inexpensive disks (RAID) controller, is disclosed. The RAID controller includes: a redundant arrays of inexpensive disks (RAID) controller board, a memory module slot mounted on the controller board for inserting therein a 144-pin small outline dual inline memory module (SODIMM), an I/O processor mounted on the controller board and electrically connected with the memory module slot for transmitting a data clock signal and an error-prevention data, and a random access memory integrated chip (RAM IC) mounted on the controller board and electrically connected with the I/O processor for storing the error-prevention data.

Abstract: A disk array controller is configured to communicate with the PCI-based host computer with a known standard PCI protocol. The standard PCI protocol typically defines a message provided for the disk array controller to negotiate with the PCI-based host computer. The message is represented by the PCI class code. By programming the PCI class code register in the PCI configuration space register (offset address 09H-0BH) with appropriate hex codes, the disk array controller will be identified as a stand PCI bus master IDE controller, and can be driven by the PCI bus master IDE controller driver utility, which is built in most of the PC-based operating system.