Patents Assigned to ACM Research, Inc.
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Patent number: 11638937Abstract: A method for effectively cleaning vias (20034), trenches (20036) or recessed areas on a substrate (20010) using an ultra/mega sonic device (1003, 3003, 16062, 17072), comprising: applying liquid (1032) into a space between a substrate (20010) and an ultra/mega sonic device (1003, 3003, 16062, 17072); setting an ultra/mega sonic power supply at frequency f1 and power P1 to drive said ultra/mega sonic device (1003, 3003, 16062, 17072); after the ratio of total bubbles volume to volume inside vias (20034), trenches (20036) or recessed areas on the substrate (20010) increasing to a first set value, setting said ultra/mega sonic power supply at frequency f2 and power P2 to drive said ultra/mega sonic device (1003, 3003, 16062, 17072); after the ratio of total bubbles volume to volume inside the vias (20034), trenches (20036) or recessed areas reducing to a second set value, setting said ultra/mega sonic power supply at frequency f1 and power P1 again; repeating above steps till the substrate (20010) being cleaned.Type: GrantFiled: July 16, 2021Date of Patent: May 2, 2023Assignee: ACM RESEARCH, INC.Inventors: Hui Wang, Xi Wang, Fuping Chen, Fufa Chen, Jian Wang, Xiaoyan Zhang, Yinuo Jin, Zhaowei Jia, Jun Wang, Xuejun Li
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Patent number: 11581205Abstract: A method for cleaning semiconductor substrate without damaging patterned structure on the substrate using ultra/mega sonic device comprising applying liquid into a space between a substrate and an ultra/mega sonic device; setting an ultra/mega sonic power supply at frequency f1 and power P1 to drive said ultra/mega sonic device; before bubble cavitation in said liquid damaging patterned structure on the substrate, setting said ultra/mega sonic power supply at frequency f2 and power P2 to drive said ultra/mega sonic device; after temperature inside bubble cooling down to a set temperature, setting said ultra/mega sonic power supply at frequency f1 and power P1 again; repeating above steps till the substrate being cleaned. Normally, if f1=f2, then P2 is equal to zero or much less than P1; if P1=P2, then f2 is higher than f1; if the f1<f2, then, P2 can be either equal or less than P1.Type: GrantFiled: January 4, 2021Date of Patent: February 14, 2023Assignee: ACM Research, Inc.Inventors: Hui Wang, Fufa Chen, Fuping Chen, Jian Wang, Xi Wang, Xiaoyan Zhang, Yinuo Jin, Zhaowei Jia, Liangzhi Xie, Jun Wang, Xuejun Li
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Patent number: 11103898Abstract: The present invention discloses a method for effectively cleaning vias, trenches or recessed areas on a substrate using an ultra/mega sonic device, comprising: applying liquid into a space between a substrate and an ultra/mega sonic device; setting an ultra/mega sonic power supply at frequency f1 and power P1 to drive said ultra/mega sonic device; after the ratio of total bubbles volume to volume inside vias, trenches or recessed areas on the substrate increasing to a first set value, setting said ultra/mega sonic power supply at frequency f2 and power P2 to drive said ultra/mega sonic device; after the ratio of total bubbles volume to volume inside the vias, trenches or recessed areas reducing to a second set value, setting said ultra/mega sonic power supply at frequency f1 and power P1 again; repeating above steps till the substrate being cleaned.Type: GrantFiled: September 19, 2016Date of Patent: August 31, 2021Assignee: ACM Research, Inc.Inventors: Hui Wang, Xi Wang, Fuping Chen, Fufa Chen, Jian Wang, Xiaoyan Zhang, Yinuo Jin, Zhaowei Jia, Jun Wang, Xuejun Li
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Patent number: 11037804Abstract: The present invention discloses a method for cleaning substrate without damaging patterned structure on the substrate using ultra/mega sonic device, comprising: applying liquid into a space between a substrate and an ultra/mega sonic device; setting an ultra/mega sonic power supply at frequency f1 and power P1 to drive said ultra/mega sonic device; after micro jet generated by bubble implosion and before said micro jet generated by bubble implosion damaging patterned structure on the substrate, setting said ultra/mega sonic power supply at frequency f2 and power P2 to drive said ultra/mega sonic device; after temperature inside bubble cooling down to a set temperature, setting said ultra/mega sonic power supply at frequency f1 and power P1 again; repeating above steps till the substrate being cleaned.Type: GrantFiled: September 20, 2016Date of Patent: June 15, 2021Assignee: ACM Research, Inc.Inventors: Hui Wang, Xi Wang, Fuping Chen, Fufa Chen, Jian Wang, Xiaoyan Zhang, Yinuo Jin, Zhaowei Jia, Jun Wang, Xuejun Li
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Patent number: 10910244Abstract: A method for cleaning semiconductor substrate without damaging patterned structure on the substrate using ultra/mega sonic device comprising applying liquid into a space between a substrate and an ultra/mega sonic device; setting an ultra/mega sonic power supply at frequency f1 and power P1 to drive said ultra/mega sonic device; before bubble cavitation in said liquid damaging patterned structure on the substrate, setting said ultra/mega sonic power supply at frequency f2 and power P2 to drive said ultra/mega sonic device; after temperature inside bubble cooling down to a set temperature, setting said ultra/mega sonic power supply at frequency f1 and power P1 again; repeating above steps till the substrate being cleaned. Normally, if f1=f2, then P2 is equal to zero or much less than P1; if P1=P2, then f2 is higher than f1; if the f1<f2, then, P2 can be either equal or less than P1.Type: GrantFiled: May 20, 2015Date of Patent: February 2, 2021Assignee: ACM Research, Inc.Inventors: Hui Wang, Fufa Chen, Fuping Chen, Jian Wang, Xi Wang, Xiaoyan Zhang, Yinuo Jin, Zhaowei Jia, Liangzhi Xie, Jun Wang, Xuejun Li
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Controlling removal rate uniformity of an electropolishing process in integrated circuit fabrication
Publication number: 20070131561Abstract: An electropolishing process in integrated circuit fabrication on a wafer includes applying a stream of electrolyte to the wafer using a nozzle positioned adjacent to the wafer with a gap between the nozzle and the wafer. The removal rate uniformity of the electropolishing process is controlled by adjusting the gap between the nozzle and the wafer to adjust the removal rate profile of the stream of electrolyte applied by the nozzle.Type: ApplicationFiled: December 17, 2004Publication date: June 14, 2007Applicant: ACM Research, Inc.Inventors: Hui Wang, Felix Gutman, Himanshu Chokshi -
Controlling removal rate uniformity of an electropolishing process in integrated circuit fabrication
Publication number: 20070125661Abstract: A metal layer formed on a wafer, the wafer having a center portion and an edge portion, is electropolished by aligning a nozzle and the wafer to position the nozzle adjacent to the center portion of the wafer. The wafer is rotated. As the wafer is rotated, a stream of electrolyte is applied from the nozzle onto a portion of the metal layer adjacent to the center portion of the wafer to begin to electropolish the portion of the metal layer with a triangular polishing profile to initially expose an underlying layer underneath the metal layer at a point.Type: ApplicationFiled: February 23, 2005Publication date: June 7, 2007Applicant: ACM RESEARCH INC.Inventors: Hui Wang, Afnan Muhammed, Jian Wang, Felix Gutman, Frederick Ho, Himanshu Chocshi -
Publication number: 20070052977Abstract: An apparatus for detecting the end-point of an electropolishing process of a metal layer formed on a wafer includes an end-point detector. The end-point detector is disposed adjacent the nozzle used to electropolish the wafer. In one embodiment, the end-point detector is configured to measure the optical reflectivity of the portion of the wafer being electropolished.Type: ApplicationFiled: November 10, 2006Publication date: March 8, 2007Applicant: ACM Research, Inc.Inventor: Hui Wang
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Publication number: 20070023912Abstract: In forming a layer of a semiconductor wafer, a dielectric layer is deposited on the semiconductor wafer. The dielectric layer includes material having a low dielectric constant. Recessed and non-recessed areas are formed in the dielectric layer. A metal layer is deposited on the dielectric layer to fill the recessed areas and cover the non-recessed areas. The metal layer is then electropolished to remove the metal layer covering the non-recessed areas while maintaining the metal layer in the recessed areas.Type: ApplicationFiled: October 5, 2006Publication date: February 1, 2007Applicant: ACM Research, Inc.Inventor: Hui Wang
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Patent number: 7136173Abstract: An apparatus for detecting the end-point of an electropolishing process of a metal layer formed on a wafer (1004) includes an end-point detector. The end-point detector is disposed adjacent the nozzle (1008) used to electropolish the wafer. In one embodiment, the end-point detector is configured to measure the optical reflectivity of the portion of the wafer being electropolished.Type: GrantFiled: May 3, 2001Date of Patent: November 14, 2006Assignee: ACM Research, Inc.Inventor: Hui Wang
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Patent number: 7119008Abstract: In forming a layer of a semiconductor wafer, a dielectric layer is deposited on the semiconductor wafer. The dielectric layer includes material having a low dielectric constant. Recessed and non-recessed areas are formed in the dielectric layer. A metal layer is deposited on the dielectric layer to fill the recessed areas and cover the non-recessed areas. The metal layer is then electropolished to remove the metal layer covering the non-recessed areas while maintaining the metal layer in the recessed areas.Type: GrantFiled: September 18, 2001Date of Patent: October 10, 2006Assignee: ACM Research, Inc.Inventor: Hui Wang
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Publication number: 20060049056Abstract: In one aspect of the present invention, an exemplary method is provided for electroplating a conductive film on a wafer. The method includes electroplating a metal film on a semiconductor structure having recessed regions and non-recessed regions within a first current density range before the metal layer is planar above recessed regions of a first density, and electroplating within a second current density range after the metal layer is planar above the recessed regions. The second current density range is greater than the first current density range. In one example, the method further includes electroplating in the second current density range until the metal layer is planar above recessed regions of a second density, the second density being greater than the first density, and electroplating within a third current density range thereafter.Type: ApplicationFiled: April 11, 2003Publication date: March 9, 2006Applicant: ACM Research, Inc.Inventors: Hui Wang, Jian Wang, Peihaur Yih, Huiquan Wu
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Publication number: 20050245086Abstract: A metal layer formed on a semiconductor wafer is adaptively electropolished. A portion of the metal layer is electropolished, where portions of the metal layer are electropolished separately. Before electropolishing the portion, a thickness measurement of the portion of the metal layer to be electropolished is determined. The amount that the portion is to be electropolished is adjusted based on the thickness measurement. A metal layer formed on a semiconductor wafer is polished, where the metal layer is formed on a barrier layer, which is formed on a dielectric layer having a recessed area and a non-recessed area, and where the metal layer covers the recessed area and the non-recessed areas of the dielectric layer. The metal layer is polished to remove, the metal layer covering the non-recessed area. The metal layer in the recessed area is polished to a height below the non-recessed area, where the height is equal to or greater than a thickness of the barrier layer.Type: ApplicationFiled: July 22, 2003Publication date: November 3, 2005Applicant: ACM Research, Inc.Inventors: Hui Wang, Muhammed Afnan, Peihaur Yih, Damon Koehler, Chaw-Chi Yu
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Publication number: 20050218003Abstract: In one aspect of the present invention, exemplary apparatus and methods are provided for electropolishing and/or electroplating processes for semiconductor wafers. One exemplary apparatus includes a cleaning module having an edge clean assembly (930) to remove metal residue on the bevel or edge portion of a wafer (901). The edge cleaning apparatus includes a nozzle head (1030) configured to supply a liquid and a gas to a major surface of the wafer, and supplies the gas radially inward of the location the liquid is supplied to reduce the potential of the liquid from flowing radially inward to the metal film formed on the wafer.Type: ApplicationFiled: April 8, 2003Publication date: October 6, 2005Applicant: ACM Research, Inc.Inventors: Hui Wang, Voha Nuch, Felix Gutman, Muhammed Afnan, Himanshu Chokshi
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Patent number: 6837984Abstract: An apparatus for electropolishing a wafer includes a wafer chuck and a stationary jet. The wafer chuck is configured to rotate and translate the wafer. The stationary jet is configured to apply an electrolyte to the wafer when the wafer is translated and rotated by the wafer chuck.Type: GrantFiled: April 10, 2002Date of Patent: January 4, 2005Assignee: ACM Research, Inc.Inventor: Hui Wang
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Publication number: 20040256245Abstract: A metal layer formed on a surface of a wafer is electropolished using a wafer chuck and a moveable nozzle. The surface on which the metal layer is formed is the same surface on which features of devices are formed. The wafer chuck is configured to rotate the wafer when the wafer is placed on top of the wafer chuck. The moveable nozzle is disposed vertically above the wafer when the wafer is placed on top of the wafer chuck. The moveable nozzle is configured to move from a first position to apply a stream of electrolyte to a first portion of the metal layer to a second position to apply the stream of electrolyte to a second portion of the metal layer when the wafer is rotated by the wafer chuck, where the first and second portions of the metal layer are located at different radial positions on the wafer.Type: ApplicationFiled: July 21, 2004Publication date: December 23, 2004Applicant: ACM Research, Inc.Inventor: Hui Wang
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Publication number: 20040211664Abstract: A wafer chuck for holding a wafer during electropolishing and/or electroplating of the wafer includes a top section, a bottom section, and a spring member. In accordance with one aspect of the present invention, the top section and the bottom section are configured to receive the wafer for processing. The spring member is disposed on the bottom section and configured to apply an electric charge to the wafer. In accordance with another aspect of the present invention, the spring member contacts a portion of the outer perimeter of the wafer. In one alternative configuration of the present invention, the wafer chuck further includes a seal member to seal the spring member from the electrolyte solution used in the electropolishing and/or electroplating process.Type: ApplicationFiled: May 25, 2004Publication date: October 28, 2004Applicant: ACM Research, Inc.Inventor: Hui Wang
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Patent number: 6749728Abstract: A wafer chuck for holding a wafer during electropolishing and/or electroplating of the wafer includes a top section, a bottom section, and a spring member. In accordance with one aspect of the present invention, the top section and the bottom section are configured to receive the wafer for processing. The spring member is disposed on the bottom section and configured to apply an electric charge to the wafer. In accordance with another aspect of the present invention, the spring member contacts a portion of the outer perimeter of the wafer. In one alternative configuration of the present invention, the wafer chuck further includes a seal member to seal the spring member from the electrolyte solution used in the electropolishing and/or electroplating process.Type: GrantFiled: December 16, 2002Date of Patent: June 15, 2004Assignee: ACM Research, Inc.Inventor: Hui Wang
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Patent number: 6726823Abstract: A wafer chuck assembly for holding a wafer during electroplating and/or electropolishing of the wafer includes a wafer chuck for receiving the wafer. The wafer chuck assembly also includes an actuator assembly for moving the wafer chuck between a first and a second position. When in the first position, the wafer chuck is opened. When in the second position, the wafer chuck is closed.Type: GrantFiled: May 23, 2001Date of Patent: April 27, 2004Assignee: ACM Research, Inc.Inventors: Hui Wang, Felix Gutman, Voha Nuch
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Patent number: 6638863Abstract: In electropolishing a metal layer on a semiconductor wafer, a dielectric layer is formed on the semiconductor wafer. The dielectric layer is formed with a recessed area and a non-recessed area. A plurality of dummy structures are formed within the recessed areas where the dummy structures are inactive areas configured to increase the planarity of a metal layer subsequently formed on the dielectric layer. A metal layer is then formed to fill the recessed area and cover the non-recessed area and the plurality of dummy structures. The metal layer is then electropolished to expose the non-recessed area.Type: GrantFiled: March 27, 2002Date of Patent: October 28, 2003Assignee: ACM Research, Inc.Inventors: Hui Wang, Peihaur Yih