Abstract: Systems and methods for routing media packets between a plurality of processors and a digital signal processor (DSP) are disclosed. An exemplary device comprises: an egress processor; an ingress processor; conversion logic; and a DSP configured to transcode a payload in the packet. The ingress processor is configured to change a first layer-2 header of a received media packet to a second layer-2 header. The second layer-2 header includes a DSP address and an egress processor address. The first layer-2 header has a first format and the second layer-2 header having a second different format. The conversion logic is configured to change the second layer-2 header to a third layer-2 header, and to change the third layer-2 header to a fourth layer-2 header including the egress processor address in the first format. The third layer-2 header includes the egress processor address in the first format.