Abstract: A system for transmitting a clock signal through a packet-based network is disclosed. The system comprises a first node configured to measure a clock frequency of the clock signal and calculate an accuracy indicator of the measured clock frequency; a second node configured to receive the clock frequency measurement and the accuracy indicator of the clock frequency measurement, and synthesize the clock signal therefrom; and a packet-based network for transmitting the measured clock frequency and accuracy indicator from the first node to the second node. A method of deriving a clock frequency by identifying packets with the shortest total transmission time is also disclosed.

Abstract: A method for phase-locking a voltage controlled oscillator is disclosed. The method comprises receiving, at a phase detector, a phase input signal and a phase feedback signal from the voltage controlled oscillator; measuring a pulse width property of an error signal output from the phase detector to obtain a pulse width property measurement; storing the pulse width property measurement in a memory; and generating a new signal from the stored pulse width property measurement to phase-lock the voltage controlled oscillator. The method of the present invention may be used to calibrate a clock, in clock holdover and in qualification of clock sources.

Abstract: A communication system for use with a packet-based network is di sclosed. A first node is configured to transmit circuit data in data packets across the network. A second node is configured to receive the data packets from the network and serialize the synchronous data The second node comprises a configurable buffer, the buffer being configurable to adjust to network packet delay variance through analysis of packet delay variance as measured over at least one period of time.