Abstract: A method for electrically characterizing a layer disposed on a substrate and electrically insulated from the substrate is disclosed. The method can include forming a test pattern, contacting the test pattern with electrical contact elements at contact regions, and measuring an electrical parameter of the layer by passing a first set of test currents between contact regions. The test pattern can be formed by pushing a pattern forming head against a top surface of the layer, introducing a first fluid into the cavity, and converting the sacrificial portion of the layer into an insulator using the first fluid and forming the test pattern under the test-pattern-shaped inner seal.
Type:
Grant
Filed:
March 25, 2022
Date of Patent:
July 11, 2023
Assignee:
Active Layer Parametrics, Inc.
Inventors:
Bulent Mehmet Basol, Jalal Ashjaee, Abhijeet Joshi
Abstract: A method for electrically characterizing a layer disposed on a substrate and electrically insulated from the substrate is disclosed. The method can include forming a test pattern, contacting the test pattern with electrical contact elements at contact regions, and measuring an electrical parameter of the layer by passing a first set of test currents between contact regions. The test pattern can be formed by pushing a pattern forming head against a top surface of the layer, introducing a first fluid into the cavity, and converting the sacrificial portion of the layer into an insulator using the first fluid and forming the test pattern under the test-pattern-shaped inner seal.
Type:
Grant
Filed:
March 16, 2020
Date of Patent:
March 29, 2022
Assignee:
Active Layer Parametrics, Inc.
Inventors:
Bulent Mehmet Basol, Jalal Ashjaee, Abhijeet Joshi
Abstract: Methods, tools and systems for full characterization of thin and ultra-thin layers employed in advanced semiconductor device structures are disclosed.
Type:
Grant
Filed:
April 25, 2017
Date of Patent:
September 29, 2020
Assignee:
Active Layer Parametrics, Inc.
Inventors:
Bulent M. Basol, Abhijeet Joshi, Jalal Ashjaee
Abstract: Methods, tools and systems for full characterization of thin and ultra-thin layers employed in advanced semiconductor device structures are disclosed.
Type:
Application
Filed:
April 25, 2017
Publication date:
May 16, 2019
Applicant:
Active Layer Parametrics, Inc.
Inventors:
Bulent M. BASOL, Abhijeet JOSHI, Jalal ASHJAEE