Abstract: An efficient, economical circuit which is easily added to existing modular or integrated pulse-width modulator circuits, e.g. switching power supply regulator circuits, having an fault comparitor which disables the pulse-width modulator when an overload error condition is detected for a time which exceeds a first RC time constant, and restoring the operation of the pulse-width modulator after a second R′C time. The differing RC and R′C time constants are provided by varied resistor circuit paths established by the state of the fault comparitor. The topology and economy of parts provide a current limiter which facilitates miniaturization and circuit integration.